Mapping of mechanical stresses in silicon substrates due to lead-tin solder bump reflow process via synchrotron x-ray topography and finite element modelling

Journal of Physics D: Applied Physics

Volumn 36, Issue 10 A, 2003, Pages

  Kanatharana, J ^a   Perez Camacho J J ^b   Buckley, T ^b   McNally, P J ^a   Tuomi, T ^c   O'Hare, M ^a   Lowney, D ^a   Chen, W ^a   Rantamaki R ^c   Knuuttila, L ^c   Riikonen, J ^c  

^a DUBLIN CITY UNIVERSITY   (Ireland)

^b Leixlip House Hotel   (Ireland)

^c AALTO UNIVERSITY   (Finland)

Author keywords

[No Author keywords available]

Indexed keywords

FINITE ELEMENT METHOD; INTEGRATED CIRCUITS; LEAD; MATHEMATICAL MODELS; MICROELECTRONIC PROCESSING; NONDESTRUCTIVE EXAMINATION; STRAIN; STRESSES; SUBSTRATES; SYNCHROTRONS; TIN; X RAYS;

SILICON SUBSTRATES; SOLDER BUMP REFLOW PROCESS; SYNCHROTRON X RAY TOPOGRAPHY;

SEMICONDUCTING SILICON;

EID: 0037607712     PISSN: 00223727     EISSN: None     Source Type: Journal    
DOI: 10.1088/0022-3727/36/10A/312     Document Type: Article

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