A low-power and high-speed quaternary interconnection link using efficient converters

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2005, Pages 4689-4692

  Philippe, Jean Marc ^a   Pillement, Sébastien ^a   Sentieys, Olivier ^a  

^a UNIVERSITÉ DE RENNES 1   (France)

Author keywords

[No Author keywords available]

Indexed keywords

BINARY SYSTEMS; DC CURRENT; ENERGY CONSUMPTION; FULL-SWING; GLOBAL INTERCONNECTS; HIGH-SPEED; INTERCONNECTION LINKS; LOW POWER; LOW-PROPAGATION; MULTIPLE-VALUED LOGIC; ON CHIPS; POWER CONSUMPTION; TRANSISTOR COUNT; VOLTAGE MODE;

MANY VALUED LOGICS;

EID: 33750596563     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1465679     Document Type: Conference Paper

References (11)

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