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Volumn , Issue , 1999, Pages 42-47
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Supplementary symmetrical logic circuit structure
a
a
EDO LLC
(United States)
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Author keywords
[No Author keywords available]
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Indexed keywords
CMOS INTEGRATED CIRCUITS;
ELECTRIC INVERTERS;
ELECTRIC NETWORK ANALYSIS;
FUNCTIONS;
LEAKAGE CURRENTS;
LOGIC CIRCUITS;
LOGIC GATES;
SET THEORY;
THRESHOLD VOLTAGE;
MULTIPLE PLACE FUNCTIONS (MPF);
ONE PLACE FUNCTIONS (OPF);
SUPPLEMENTARY SYMMETRICAL LOGIC CIRCUIT (SUS-LOC) STRUCTURES;
MANY VALUED LOGICS;
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EID: 0032627236
PISSN: 0195623X
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Article |
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Times cited : (7)
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References (5)
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