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Volumn 2006, Issue , 2006, Pages 34-45

Self-healing asynchronous arrays

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT THEORY; COMPUTER SYSTEM RECOVERY; ERROR ANALYSIS; NANOTECHNOLOGY; NUCLEAR MAGNETIC RESONANCE;

EID: 33749589721     PISSN: 26431394     EISSN: 26431483     Source Type: Conference Proceeding    
DOI: 10.1109/ASYNC.2006.25     Document Type: Conference Paper
Times cited : (6)

References (21)
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    • Explicit construction of linear sized tolerant networks
    • N. Alon and F. Chung. Explicit construction of linear sized tolerant networks. Discrete Math, 72:15-19, 1988.
    • (1988) Discrete Math , vol.72 , pp. 15-19
    • Alon, N.1    Chung, F.2
  • 2
    • 33747566850 scopus 로고    scopus 로고
    • 3-D ICs: A novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration
    • K. Banerjee, S. J. Souri, and P. Kapur et al. 3-D ICs: A novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration. Proc. IEEE, 89(5), 2001.
    • (2001) Proc. IEEE , vol.89 , Issue.5
    • Banerjee, K.1    Souri, S.J.2    Kapur, P.3
  • 3
    • 0043065549 scopus 로고    scopus 로고
    • The future of nanocomputing
    • G. Bourianoff. The future of nanocomputing. Computer, 36(8), 2003.
    • (2003) Computer , vol.36 , Issue.8
    • Bourianoff, G.1
  • 4
    • 85018132173 scopus 로고
    • Edge fault tolerance in graphs
    • F. Haray and J. P. Hayes. Edge fault tolerance in graphs. Networks, 23:135-142, 1993.
    • (1993) Networks , vol.23 , pp. 135-142
    • Haray, F.1    Hayes, J.P.2
  • 5
    • 0016992757 scopus 로고    scopus 로고
    • A graph model for fault-tolerant computing systems
    • J. P. Hayes. A graph model for fault-tolerant computing systems. IEEE Trans. on Computers, 25(9), 1976.
    • IEEE Trans. on Computers , vol.25 , Issue.9 , pp. 1976
    • Hayes, J.P.1
  • 10
    • 0038111456 scopus 로고
    • Master's thesis, California Institute of Technology
    • A. Lines. Pipelined asynchronous circuits. Master's thesis, California Institute of Technology, 1995.
    • (1995) Pipelined Asynchronous Circuits
    • Lines, A.1
  • 12
    • 0003280654 scopus 로고
    • Synthesis of asynchronous VLSI circuits
    • California Institute of Technology
    • A. J. Martin. Synthesis of asynchronous VLSI circuits. Technical Report CS-TR-93-28, California Institute of Technology, 1993.
    • (1993) Technical Report , vol.CS-TR-93-28
    • Martin, A.J.1
  • 16
    • 33748535533 scopus 로고    scopus 로고
    • Explicit constructions of faulttolerant open linear arrays
    • Cornell University
    • S. Peng and R. Manohar. Explicit constructions of faulttolerant open linear arrays. Technical Report CSL-TR-2005-1044, Cornell University, 2005.
    • (2005) Technical Report , vol.CSL-TR-2005-1044
    • Peng, S.1    Manohar, R.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.