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Volumn 2002-January, Issue , 2002, Pages 231-240

Implementing asynchronous embryonic circuits using AARDVArc

Author keywords

Biology computing; Circuit faults; Clocks; Displays; Embryo; Energy consumption; Fault tolerance; Logic design; Organisms; Scalability

Indexed keywords

ASYNCHRONOUS SEQUENTIAL LOGIC; CLOCKS; COMPUTATION THEORY; DESIGN; DISPLAY DEVICES; ENERGY UTILIZATION; FAULT TOLERANCE; HARDWARE; LOGIC DESIGN; NASA; SCALABILITY;

EID: 84949185911     PISSN: 15506029     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EH.2002.1029889     Document Type: Conference Paper
Times cited : (10)

References (13)
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  • 2
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    • D.Phil. Thesis, Bio-inspired and Bio-medical Engineering, The Department of Electronics, The University of York
    • Ortega-Sánchez, C. A. (2000), "Embryonics: A Bioinspired Fault-tolerant Multicellular System", D.Phil. Thesis, Bio-inspired and Bio-medical Engineering, The Department of Electronics, The University of York: 159.
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  • 3
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    • Ortega, C. & Tyrrell, A. (2000), "A Hardware Implementation of an Embryonic Architecture Using Virtex FPGAs", Evolvable Systems: From Biology to Hardware, Proceedings of 3rd International Conference (ICES2000), Lecture Notes in Computer Science, 1801, 155-164, Miller, J. et al. (eds.), Springer-Verlag.
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    • Asynchronous Design Methodologies: An Overview
    • Hauck, S. (1995), "Asynchronous Design Methodologies: An Overview", Proceedings of the IEEE, 83(1): 69-93.
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  • 8
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  • 11
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  • 12
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.