Asynchronous IC interconnect network design and implementation using a standard ASIC flow

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn 2005, Issue , 2005, Pages 267-274

  Quinton, Bradley R ^a   Greenstreet, Mark R ^a   Wilton, Steven J E ^a  

^a UNIVERSITY OF BRITISH COLUMBIA   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

GLOBAL CLOCK; IC DESIGN; PIPELINE STAGES; SYNCHRONOUS INTERCONNECT;

COMPUTER GRAPHICS; INTEGRATED CIRCUITS; PROBLEM SOLVING;

ASYNCHRONOUS MACHINERY;

EID: 33748572934     PISSN: 10636404     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2005.30     Document Type: Conference Paper

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