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Volumn , Issue , 2003, Pages 56-66

Energy and performance models for clocked and asynchronous communication

Author keywords

[No Author keywords available]

Indexed keywords

CLOCKS; FRUITS; PIPELINES;

EID: 77957946267     PISSN: 26431394     EISSN: 26431483     Source Type: Conference Proceeding    
DOI: 10.1109/ASYNC.2003.1199166     Document Type: Conference Paper
Times cited : (17)

References (10)
  • 1
    • 0038788334 scopus 로고    scopus 로고
    • PhD thesis, Department of Computer Science, University of Manchester, Mar.
    • W. J. Bainbridge. Asynchronous System-on-Chip Interconnect. PhD thesis, Department of Computer Science, University of Manchester, Mar. 2000.
    • (2000) Asynchronous System-on-Chip Interconnect
    • Bainbridge, W.J.1
  • 4
    • 0036294823 scopus 로고    scopus 로고
    • Power-performance evaluation of globally asynchronous, locally synchronous processors
    • Anchorage, AK, May
    • A. Iyer and D. Marculescu. Power-Performance Evaluation of Globally Asynchronous, Locally Synchronous Processors. In Proc. Intl. Symposium on Computer Architecture (ISCA), pages 158-168, Anchorage, AK, May 2002.
    • (2002) Proc. Intl. Symposium on Computer Architecture (ISCA) , pp. 158-168
    • Iyer, A.1    Marculescu, D.2
  • 6
    • 0001951703 scopus 로고
    • System timing
    • C. A. Mead and L. A. Conway, editors chapter 7. Addison Wesley
    • C. L. Seitz. System timing. In C. A. Mead and L. A. Conway, editors, Introduction to VLSI Systems, chapter 7. Addison Wesley, 1980.
    • (1980) Introduction to VLSI Systems
    • Seitz, C.L.1
  • 10
    • 0003400983 scopus 로고
    • Principles of CMOS VLSI design: A systems perspective
    • Addison-Wesley, Menlo Park, CA
    • N. Weste and K. Eshraghian. Principles of CMOS VLSI Design: A Systems Perspective. VLSI Systems. Addison-Wesley, Menlo Park, CA, 1985.
    • (1985) VLSI Systems
    • Weste, N.1    Eshraghian, K.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.