Post-silicon debug using programmable logic cores

Proceedings - 2005 IEEE International Conference on Field Programmable Technology

Volumn 2005, Issue , 2005, Pages 241-247

  Quinten, Bradley R ^a   Wilton, Steven J E ^a  

^a UNIVERSITY OF BRITISH COLUMBIA   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; INTEGRATED CIRCUIT LAYOUT; MICROPROCESSOR CHIPS; PROBLEM SOLVING; PROGRAMMABLE LOGIC CONTROLLERS; SEMICONDUCTING SILICON; INTEGRATED CIRCUITS; NETWORK ARCHITECTURE; PROGRAMMED CONTROL SYSTEMS; SILICON;

DEBUGGING; FLEXIBLE NETWORKS; PIN-POINT PROBLEMS; PROGRAMMABLE LOGIC CORES (PLC);

COMPUTER VIRUSES; COMPUTER CIRCUITS;

AREA OVERHEAD; CORE NETWORKS; FLEXIBLE NETWORKS; POINT PROBLEM; POST-SILICON DEBUG; PROGRAMMABLE LOGIC CORES; PROPOSED ARCHITECTURES;

EID: 33846613718     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPT.2005.1568553     Document Type: Conference Paper

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