Low-threshold-voltage HfOxN p-channel metal-oxide-semiconductor field-effect transistors with partially suicided platinum gate electrode

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 45, Issue 8 A, 2006, Pages 6225-6230

  Kadoshima, Masaru ^a   Nabatame, Toshihide ^a   Iwamoto, Kunihiko ^a   Mise, Nobuyuki ^a   Ota, Hiroyuki ^b   Ogawa, Arito ^a   Takahashi, Masashi ^a   Ikeda, Minoru ^a   Satake, Hideki ^a   Toriumi, Akira ^b,c  

^a ASSOCIATION OF SUPER ADVANCED ELECTRONICS TECHNOLOGIES ASET   (Japan)

^b NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

^c UNIVERSITY OF TOKYO   (Japan)

Author keywords

CMOS; Fermi level pinning; High k; Metal gate; Partial suicide; Platinum suicide; Threshold voltage control

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRODES; FERMI LEVEL; HOLE MOBILITY; MOSFET DEVICES; PLATINUM; THRESHOLD VOLTAGE;

GATE ELECTRODES; METAL GATES; PARTIAL SUICIDE; PINNING; THRESHOLD VOLTAGE CONTROL;

GATES (TRANSISTOR);

EID: 33748572662     PISSN: 00214922     EISSN: 13474065     Source Type: Journal    
DOI: 10.1143/JJAP.45.6225     Document Type: Article

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