CMOS integration of epitaxial Gd2O3 high-k gate dielectrics

Solid-State Electronics

Volumn 50, Issue 6, 2006, Pages 979-985

  Gottlob, H D B ^a   Echtermeyer, T ^a   Mollenhauer, T ^a   Efavi, J K ^a   Schmidt, M ^a   Wahlbrink, T ^a   Lemme, M C ^a   Kurz, H ^a   Czernohorsky, M ^b   Bugiel, E ^b   Osten, H J ^b   Fissel, A ^b  

^a AMO GMBH   (Germany)

^b LEIBNIZ UNIVERSITY HANNOVER   (Germany)

Author keywords

CMOS integration; Epitaxial gate dielectric; Gadolinium oxide (Gd2O3); High k gate dielectric; Metal gate electrode; Silicon on insulator (SOI)

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; ELECTRIC POTENTIAL; ELECTRODES; EPITAXIAL GROWTH; GADOLINIUM COMPOUNDS; GATES (TRANSISTOR); SILICON ON INSULATOR TECHNOLOGY;

CMOS INTEGRATION; EPITAXIAL GATE DIELECTRIC; HIGH-K GATE DIELECTRIC; KWD GADOLINIUM OXIDE (GD2O3); METAL GATE ELECTRODE; SILICON ON INSULATOR (SOI);

DIELECTRIC DEVICES;

EID: 33745761180     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2006.04.018     Document Type: Article

References (14)

1. Wong H.S.P., Frank D.J., Solomon P.M., Wann C.H.J., and Welser J.J. Nanoscale CMOS. Proc IEEE 87 4 (1999) 537-570
2. International Technology Roadmap for Semiconductors (ITRS), Process integration, devices, and structures. Available from: http://public.itrs.net, p. 23, 2004 update.
3. Osten H.J., Liu J.P., Gaworzewski P., Bugiel E., and Zaumseil P. High-k gate dielectrics with ultra-low leakage current based on praseodymium oxide. IEDM Tech Dig (2000) 653-656
4. 3 for Si. J Appl Phys 89 7 (2001) 3920-3927
5. Wakabayashi H., Saito Y., Takeuchi K., Mogami T., and Kunio T. A dual-metal gate CMOS technology using nitrogen-concentration-controlled TINX film. IEEE Trans Electron Dev 48 10 (2001) 2363-2369
6. Cabral Jr. C., Kedzierski J., Linder B., Zafar S., Narayanan V., Fang S., et al. Dual workfunction fully silicided metal gates. Symp VLSI Tech Dig (2004) 184-185
7. Fissel A., Elassar Z., Bugiel E., Czernohorsky M., Kirfel O., and Osten H.J. Interface formation during epitaxial growth of neodymium oxide on silicon. J Appl Phys 99 (2006) 074105-1-074105-6
8. Osten H.J., Bugiel E., and Fissel A. Epitaxial praseodymium oxide: a new high-k dielectric. Solid-State Electron. 47 (2003) 2161-2165
9. Lemme M.C., Mollenhauer T., Gottlob H., Henschel W., Efavi J., Welch C., and Kurz H. Highly selective HBr etch process for fabrication of triple-gate nano-scale SOI-MOSFETs. Microelectron Eng 73-74 (2004) 346-350
10. 3. J Electrochem Soc 152 6 (2005) C399-C402
11. Lemme M.C., Efavi J.K., Mollenhauer T., Schmidt M., Gottlob H.D.B., Wahlbrink T., et al. Nanoscale TiN metal gate technology for CMOS integration. Microelectron Eng 83 4-9 (2006) 1551-1554
12. Gottlob H.D.B., Mollenhauer T., Wahlbrink T., Schmidt M., Echtermeyer T., Efavi J.K., et al. Scalable gate first process for silicon on insulator metal oxide semiconductor field effect transistors with epitaxial high-k dielectrics. J Vac Sci Technol B 24 2 (2006) 710-714
13. Claflin B., and Lucovsky G. Interface formation and thermal stability and ultrathin gate dielectric layers. J Vac Sci Technol B 16 4 (1998) 2154-2158
14. Gilmer D., Hobbs C., Hegde R., La L., Adetutu O., Conner J., et al. Investigation of titanium nitride gates for tantalum pentoxide and titanium dioxide dielectrics. J Vac Sci Technol A 18 4 (2000) 1158-1162