Gate capacitances behavior of nanometer FD SOI CMOS devices with HfO2 high-k gate dielectric considering vertical and fringing displacement effects using 2-D simulation

IEEE Transactions on Electron Devices

Volumn 53, Issue 6, 2006, Pages 1373-1378

  Lin, Yu Sheng ^a   Lin, Chia Hong ^a   Kuo, James B ^a   Su, Ke Wei ^a,b  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

^b TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

Capacitance; CMOSFETs; Permittivity; Silicon on insulator (SOI) technology

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; GATES (TRANSISTOR); HAFNIUM COMPOUNDS; MOSFET DEVICES; PERMITTIVITY; SILICON ON INSULATOR TECHNOLOGY;

FRINGING DISPLACEMENT EFFECTS; GATE CAPACITANCE; GATE DIELECTRIC;

CMOS INTEGRATED CIRCUITS;

EID: 33744825244     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2006.874157     Document Type: Article

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