Modeling the Fringing Electric Field Effect on the Threshold Voltage of FD SOT nMOS Devices with the LDD/Sidewall Oxide Spacer Structure

IEEE Transactions on Electron Devices

Volumn 50, Issue 12, 2003, Pages 2559-2564

  Lin, S C ^a   Kuo, J B ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

Device model; Fringing electric field; Fully depleted; NMOS; Silicon on insulator (SOI)

Indexed keywords

BOUNDARY CONDITIONS; COMPUTER SIMULATION; ELECTRIC FIELD EFFECTS; ELECTRIC FIELDS; ELECTRIC INSULATORS; GATES (TRANSISTOR); MATHEMATICAL MODELS; MOS DEVICES; PERMITTIVITY; POISSON EQUATION; SEMICONDUCTOR DOPING; THIN FILMS;

DEVICE MODELS; FRINGING ELECTRIC FIELDS;

THRESHOLD VOLTAGE;

EID: 0347338039     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2003.816910     Document Type: Article

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