Comprehensive dynamic analysis of wirebonding on Cu/Low-K wafers

IEEE Transactions on Advanced Packaging

Volumn 29, Issue 2, 2006, Pages 264-270

  Yeh, Chang Lin ^a   Lai, Yi Shao ^a  

^a ADVANCED SEMICONDUCTOR ENGINEERING INC   (Taiwan)

Author keywords

Cu low K; Explicit finite element analysis; Impact; Ultrasonic vibration; Wirebonding

Indexed keywords

BONDING; COPPER; FINITE ELEMENT METHOD; IMPACT TESTING; ULTRASONIC TESTING;

COPPER/LOW-K WAFERS; ULTRASONIC VIBRATION; WIREBONDING;

SILICON WAFERS;

EID: 33646507256     PISSN: 15213323     EISSN: None     Source Type: Journal    
DOI: 10.1109/TADVP.2006.871193     Document Type: Article

References (15)

1. R. G. McKenna and R. L. Mahle, "High impact bonding to improve reliability of VLSI die in plastic packages," in Proc. 39th Electron. Compon. Technol. Conf., Houston, TX, 1989, pp. 424-427.
2. B. Gonzalez, S. Knecht, H. Handy, and J. Ramirez, "The effect of ultrasonic frequency on fine pitch aluminum wedge wirebond," in Proc. 46th Electron. Compon. Technol. Conf., Orlando, FL, 1996, pp. 1078-1087.
3. Y. Tamura, Y. Miyahara, and H. Suzuki, "Analysis and application of vibration behavior for wirebonding capillary by transmission laser vibrometer," in Proc. SEMICON Int. Electron. Manuf. Technol. Symp., Austin, TX, 1998, pp. 72-75.
4. Y. Takahashi, M. Inoue, and K. Inoue, "Numerical analysis of fine lead bonding-effect of pad thickness on interfacial deformation," IEEE Trans. Compon. Packag. Technol., vol. 22, no. 2, pp. 291-298, Jun. 1999.
5. T. A. Tran, L. Yong, B. Williams, S. Chen, and A. Chen, "Fine pitch probing and wirebonding and reliability of aluminum capped copper bond pads," in Proc. 50th Electron. Compon. Technol. Conf., Las Vegas, NV, 2000, pp. 1674-1680.
6. C. V. Pham and K. Huth, "A new approach to the robust wirebonding," in Proc. Int. Symp. Adv. Packag. Mater.: Processes, Properties, and Interfaces, Braselton, GA, 2001, pp. 379-385.
7. V. Kripesh, M. Sivakumar, L. A. Lim, R. Kumar, and M. K. Iyer, "Wire bonding process impact on low-K dielectric material in damascene copper integrated circuits," in Proc. 52nd Electron. Compon. Technol. Conf., San Diego, CA, 2002, pp. 873-880.
8. T.-C. Huang, M.-S. Liang, T.-T. Chao, T.-L. Lee, S.-C. Chen, C. Hsia, and M.-S. Liang, "Wire bonding failure mechanisms and simulations of Cu Low-K IMD chip packaging," in Proc. Adv. Metallization Conf., 2002, pp. 67-73.
9. J. W. Brunner, F. Keller, and T. Pan, "Optimization of wire bonding over Cu-low K pad stack," in Proc. 36th Int. Symp. Microelectron., Boston, MA, 2003, pp. 136-140.
10. C.-Y. Kao, Stress analysis of Cu chip during wire bonding process (in Chinese), 2002. Unpublished manuscript.
11. D. Degryse, B. Vandevelde, and E. Beyne, "Mechanical FEM simulation of bonding process on Cu lowk wafers," IEEE Trans. Compon. Packag. Technol., vol. 27, no. 4, pp. 643-650, Dec. 2004.
12. C.-L. Yeh and Y-S. Lai, "Transient analysis of the impact stage of wirebonding on Cu/low-K wafers," Microelectron. Rel., vol. 45, no. 2, pp. 371-378, 2005.
13. M. Ikeda, H. Kudo, R. Shinohara, F. Shimpuku, M. Yamada, and Y. Furumura, "Integration of organic low-K material with Cu-damascene employing novel process," in Proc. IEEE Int. Interconnect Technol. Conf., San Francisco, CA, 1998, pp. 131-133.
14. CINDAS LLC, "Microelectronics packaging materials database (MPMD, " Center for Information and Numer. Data Anal. Synthesis, Purdue Univ., West Lafayette, IN, 2003.
15. C.-L. Kao, C.-L. Yeh, Y.-S. Lai, and J.-D. Wu, "Investigation of proper model scale for impact analysis of wirebonding on Cu/low-K wafers," in Proc. 2003 Taiwan ANSYS User Conf., Yunlin, Taiwan, R.O.C., 2003, pp. 65-69.