Mechanical FEM simulation of bonding process on Cu LowK wafers

IEEE Transactions on Components and Packaging Technologies

Volumn 27, Issue 4, 2004, Pages 643-650

  Degryse, Dominiek ^a   Vandevelde, Bart ^a   Beyne, Eric ^a  

^a IMEC   (Belgium)

Author keywords

Integrated circuit (IC) processing; LowK materials

Indexed keywords

BONDING; COMPUTER SIMULATION; COPPER; DIELECTRIC MATERIALS; ELECTRIC WIRE; FINITE ELEMENT METHOD; HARDNESS; MATHEMATICAL MODELS; MECHANICAL PROPERTIES; SILICON COMPOUNDS; STIFFNESS; YIELD STRESS;

CONTACT ANALYSIS; INTEGRRATED CIRCUIT (IC) PROCESSING; LOWK MATERIALS; SILICON OXIDE; WIRE BONDING;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 10244250286     PISSN: 15213331     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAPT.2004.838862     Document Type: Article

References (9)

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