-
1
-
-
0017493207
-
"Negative bias stress of MOS devices at high electric fields and degradation of MNOS devices"
-
May
-
K. O. Jeppson and C. M. Svensson, "Negative bias stress of MOS devices at high electric fields and degradation of MNOS devices," J. Appl. Phys., vol. 48, no. 5, pp. 2004-2014, May 1977.
-
(1977)
J. Appl. Phys.
, vol.48
, Issue.5
, pp. 2004-2014
-
-
Jeppson, K.O.1
Svensson, C.M.2
-
2
-
-
0037634588
-
"Dynamic NBTI of PMOS transistors and its impact on device lifetime"
-
G. Chen, K. Y. Chuah, M. F. Li, D. S. H. Chan, C. H. Ang, J. Z. Zheng, Y. Jin, and D.-L. Kwong, "Dynamic NBTI of PMOS transistors and its impact on device lifetime," in Proc. Int. Reliab. Phys. Symp., 2003, pp. 196-202.
-
(2003)
Proc. Int. Reliab. Phys. Symp.
, pp. 196-202
-
-
Chen, G.1
Chuah, K.Y.2
Li, M.F.3
Chan, D.S.H.4
Ang, C.H.5
Zheng, J.Z.6
Jin, Y.7
Kwong, D.-L.8
-
3
-
-
0842266651
-
"A critical examination of the mechanics of dynamic NBTI for PMOSFETs"
-
M. A. Alam, "A critical examination of the mechanics of dynamic NBTI for PMOSFETs," in IEDM Tech. Dig., 2003, pp. 345-348.
-
(2003)
IEDM Tech. Dig.
, pp. 345-348
-
-
Alam, M.A.1
-
4
-
-
0037972838
-
"Evidence for hydrogen-related defects during NBTI stress in p-MOSFETs"
-
V. Huard, F. Monsieur, G. Ribes, and S. Bruyere, "Evidence for hydrogen-related defects during NBTI stress in p-MOSFETs," in Proc. Int. Reliab. Phys. Symp., 2003, pp. 178-182.
-
(2003)
Proc. Int. Reliab. Phys. Symp.
, pp. 178-182
-
-
Huard, V.1
Monsieur, F.2
Ribes, G.3
Bruyere, S.4
-
5
-
-
0141426793
-
"Experimental evidence for the generation of bulk traps by negative bias temperature stress and their impact on the integrity of direct-tunneling gate dielectrics"
-
S. Tsujikawa, K. Watanabe, R. Tsuchiya, K. Ohnishi, and J. Yugami, "Experimental evidence for the generation of bulk traps by negative bias temperature stress and their impact on the integrity of direct-tunneling gate dielectrics," in VLSI Symp. Tech. Dig., 2003, pp. 139-140.
-
(2003)
VLSI Symp. Tech. Dig.
, pp. 139-140
-
-
Tsujikawa, S.1
Watanabe, K.2
Tsuchiya, R.3
Ohnishi, K.4
Yugami, J.5
-
6
-
-
33645470424
-
"Fast and slow dynamic NBTI components in p-MOSFET with SiON dielectric and their impact on device life-time and circuit application"
-
T. Yang, M. F. Li, C. Shen, C. H. Ang, C. X. Zhu, Y. C. Yeo, G. Samudra, S. C. Rustagi, M. B. Yu, and D.-L. Kwong, "Fast and slow dynamic NBTI components in p-MOSFET with SiON dielectric and their impact on device life-time and circuit application," in VLSI Symp. Tech. Dig., 2005, pp. 92-93.
-
(2005)
VLSI Symp. Tech. Dig.
, pp. 92-93
-
-
Yang, T.1
Li, M.F.2
Shen, C.3
Ang, C.H.4
Zhu, C.X.5
Yeo, Y.C.6
Samudra, G.7
Rustagi, S.C.8
Yu, M.B.9
Kwong, D.-L.10
-
7
-
-
27144524994
-
"Interface trap passivation effect in NBTI measurement for p-MOSFET with SiON gate dielectric"
-
Oct
-
T. Yang, C. Shen, M. F. Li, C. H. Ang, C. X. Zhu, Y.-C. Yeo, G. Samudra, and D.-L. Kwong, "Interface trap passivation effect in NBTI measurement for p-MOSFET with SiON gate dielectric," IEEE Electron Device Lett., vol. 26, no. 10, pp. 758-760, Oct. 2005.
-
(2005)
IEEE Electron Device Lett.
, vol.26
, Issue.10
, pp. 758-760
-
-
Yang, T.1
Shen, C.2
Li, M.F.3
Ang, C.H.4
Zhu, C.X.5
Yeo, Y.-C.6
Samudra, G.7
Kwong, D.-L.8
-
9
-
-
3042607843
-
"Hole trapping effect on methodology for dc and ac negative bias temperature instability measurements in PMOS transistors"
-
V. Huard and M. Denais, "Hole trapping effect on methodology for dc and ac negative bias temperature instability measurements in PMOS transistors," in Proc. Int. Reliab. Phys. Symp., 2004, pp. 40-45.
-
(2004)
Proc. Int. Reliab. Phys. Symp.
, pp. 40-45
-
-
Huard, V.1
Denais, M.2
-
10
-
-
0842309776
-
"Universal recovery behavior of negative bias temperature instability"
-
S. Rangan, N. Mielke, and E. C. C. Yeh, "Universal recovery behavior of negative bias temperature instability," in IEDM Tech. Dig., 2003, pp. 341-344.
-
(2003)
IEDM Tech. Dig.
, pp. 341-344
-
-
Rangan, S.1
Mielke, N.2
Yeh, E.C.C.3
-
11
-
-
4444334644
-
"Evidence for two distinct positive trapped charge components in NBTI stressed p-MOSFETs employing ultrathin CVD silicon nitride gate dielectric"
-
Sep
-
D. S. Ang and K. L. Pey, "Evidence for two distinct positive trapped charge components in NBTI stressed p-MOSFETs employing ultrathin CVD silicon nitride gate dielectric," IEEE Electron Device Lett., vol. 25, no. 9, pp. 637-639, Sep. 2004.
-
(2004)
IEEE Electron Device Lett.
, vol.25
, Issue.9
, pp. 637-639
-
-
Ang, D.S.1
Pey, K.L.2
-
12
-
-
20644443509
-
"The role of nitrogen-related defects in high-k dielectric oxides: Density-functional studies"
-
art. no. 053704, Mar
-
J. L. Gavartin, A. L. Shluger, A. S. Foster, and G. I. Bersuker, "The role of nitrogen-related defects in high-k dielectric oxides: Density-functional studies," J. Appl. Phys., vol. 97, art. no. 053704, Mar. 2005.
-
(2005)
J. Appl. Phys.
, vol.97
-
-
Gavartin, J.L.1
Shluger, A.L.2
Foster, A.S.3
Bersuker, G.I.4
-
13
-
-
17044380280
-
"Reaction-dispersive proton transport model for negative bias temperature instabilities"
-
art. no. 093506, Feb
-
M. Houssa, M. Aoulaiche, S. De Gendt, G. Groeseneken, M. M. Heyns, and A. Stesmans, "Reaction-dispersive proton transport model for negative bias temperature instabilities," Appl. Phys. Lett., vol. 86, art. no. 093506, Feb. 2005.
-
(2005)
Appl. Phys. Lett.
, vol.86
-
-
Houssa, M.1
Aoulaiche, M.2
De Gendt, S.3
Groeseneken, G.4
Heyns, M.M.5
Stesmans, A.6
-
14
-
-
19944380462
-
2 and SiON gate dielectrics understood through disorder-controlled kinetics"
-
Jun
-
2 and SiON gate dielectrics understood through disorder-controlled kinetics," Microelectron. Eng., vol. 80, no. 1, pp. 122-125, Jun. 2005.
-
(2005)
Microelectron. Eng.
, vol.80
, Issue.1
, pp. 122-125
-
-
Kaczer, B.1
Arkhipov, V.2
Jurczak, M.3
Groeseneken, G.4
-
15
-
-
0003164115
-
"Two-carrier nature of interface-state generation on hole trapping and radiation damage"
-
Jul
-
S. K. Lai, "Two-carrier nature of interface-state generation on hole trapping and radiation damage," Appl. Phys. Lett., vol. 39, no. 1, pp. 58-60, Jul. 1981.
-
(1981)
Appl. Phys. Lett.
, vol.39
, Issue.1
, pp. 58-60
-
-
Lai, S.K.1
-
16
-
-
79955985472
-
y"
-
Sep
-
y," Appl. Phys. Lett., vol. 81, no. 10, pp. 1818-1820, Sep. 2002.
-
(2002)
Appl. Phys. Lett.
, vol.81
, Issue.10
, pp. 1818-1820
-
-
Ushio, J.1
Maruizumi, T.2
Kushida-Abdelghafar, K.3
-
17
-
-
29244455322
-
"Evidence of two distinct degradation mechanisms from temperature dependence of negative bias stressing of the ultrathin gate P-MOSFET"
-
Dec
-
D. S. Ang, S. Wang, and C. H. Ling, "Evidence of two distinct degradation mechanisms from temperature dependence of negative bias stressing of the ultrathin gate P-MOSFET," IEEE Electron Device Lett., vol. 26, no. 12, pp. 906-908, Dec. 2005.
-
(2005)
IEEE Electron Device Lett.
, vol.26
, Issue.12
, pp. 906-908
-
-
Ang, D.S.1
Wang, S.2
Ling, C.H.3
|