New test methodology for resistive open defect detection in memory address decoders

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 2004, Pages 123-128

  Azimane, Mohamed ^a   Majhi, Ananta K ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ADDRESS DECODER OPEN FAULTS (ADOF); METHODOLOGY; OPEN DEFECTS; SYSTEM ON CHIP (SOC) DESIGN;

COMPUTER SIMULATION; DATABASE SYSTEMS; DECODING; DEFECTS; DESIGN FOR TESTABILITY; DETECTOR CIRCUITS; ELECTRIC CONDUCTIVITY; ELECTRIC FAULT CURRENTS; MAPPING; PROGRAM DIAGNOSTICS; QUALITY CONTROL; SEMICONDUCTOR STORAGE; TRANSISTORS;

CMOS INTEGRATED CIRCUITS;

EID: 3142664872     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTEST.2004.1299235     Document Type: Conference Paper

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