-
1
-
-
0031997667
-
On-line testing for VLSI - A compendium of approaches
-
M. Nicolaidis and Y. Zorian, "On-line testing for VLSI - A compendium of approaches," Journal of Electronic Testing: Theory and Applications, vol. 12, no. 1-2, pp. 7-20, 1998.
-
(1998)
Journal of Electronic Testing: Theory and Applications
, vol.12
, Issue.1-2
, pp. 7-20
-
-
Nicolaidis, M.1
Zorian, Y.2
-
2
-
-
0024170510
-
A concurrent testing technique for digital circuits
-
K. K. Saluja, R. Sharma, and C. R. Kime, "A concurrent testing technique for digital circuits," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 7, pp. 1250-1260, 1988.
-
(1988)
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
, vol.7
, pp. 1250-1260
-
-
Saluja, K.K.1
Sharma, R.2
Kime, C.R.3
-
3
-
-
0032313715
-
R-CBIST: An effective RAM-based input vector monitoring concurrent BIST technique
-
I. Voyiatzis, A. Paschalis, D. Nikolos, and C. Halatsis, "R-CBIST: An effective RAM-based input vector monitoring concurrent BIST technique," in International Test Conference, 1998, pp. 918-925.
-
(1998)
International Test Conference
, pp. 918-925
-
-
Voyiatzis, I.1
Paschalis, A.2
Nikolos, D.3
Halatsis, C.4
-
4
-
-
0027840785
-
Concurrent error detection in nonlinear digital circuits with applications to adaptive filters
-
A. Chatterjee and R. K. Roy, "Concurrent error detection in nonlinear digital circuits with applications to adaptive filters," in International Conference on Computer Design, 1993, pp. 606-609.
-
(1993)
International Conference on Computer Design
, pp. 606-609
-
-
Chatterjee, A.1
Roy, R.K.2
-
6
-
-
0031340066
-
A parametrized VHDL library for on-line testing
-
C. Stroud, M. Ding, S. Seshadri, I. Kim, S. Roy, S. Wu, and R. Karri, "A parametrized VHDL library for on-line testing," in International Test Conference, 1997, pp. 479-488.
-
(1997)
International Test Conference
, pp. 479-488
-
-
Stroud, C.1
Ding, M.2
Seshadri, S.3
Kim, I.4
Roy, S.5
Wu, S.6
Karri, R.7
-
7
-
-
0033309292
-
Finite state machine synthesis with concurrent error detection
-
C. Zeng, N. Saxena, and E. J. McCluskey, "Finite state machine synthesis with concurrent error detection," in International Test Conference, 1999, pp. 672-679.
-
(1999)
International Test Conference
, pp. 672-679
-
-
Zeng, C.1
Saxena, N.2
McCluskey, E.J.3
-
8
-
-
0025438849
-
Hierarchical test generation using pre-computed tests for modules
-
B. T. Murray and J. P. Hayes, "Hierarchical test generation using pre-computed tests for modules," IEEE Transactions on Computer Aided Design, vol. 9, no. 6, pp. 594-603, 1990.
-
(1990)
IEEE Transactions on Computer Aided Design
, vol.9
, Issue.6
, pp. 594-603
-
-
Murray, B.T.1
Hayes, J.P.2
-
9
-
-
0027803334
-
CHEETA: Composition of hierarchical sequential tests using ATKET
-
P. Vishakantaiah, J. A. Abraham, and D. G. Saab, "CHEETA: Composition of hierarchical sequential tests using ATKET," in International Test Conference, 1993, pp. 606-615.
-
(1993)
International Test Conference
, pp. 606-615
-
-
Vishakantaiah, P.1
Abraham, J.A.2
Saab, D.G.3
-
10
-
-
0032597868
-
TRANSPARENT: A system for RTL testability analysis, DFT guidance and hierarchical test generation
-
Y. Makris, J. Collins, A. Orailoglu, and P. Vishakantaiah, "TRANSPARENT: A system for RTL testability analysis, DFT guidance and hierarchical test generation," in Custom Integrated Circuits Conference, 1999, pp. 159-162.
-
(1999)
Custom Integrated Circuits Conference
, pp. 159-162
-
-
Makris, Y.1
Collins, J.2
Orailoglu, A.3
Vishakantaiah, P.4
-
11
-
-
0023997329
-
Test generation for data-path logic: The F-path method
-
S. Freeman, "Test generation for data-path logic: The F-path method," IEEE Journal of Solid-State Circuits, vol. 23, pp. 421-427, 1988.
-
(1988)
IEEE Journal of Solid-State Circuits
, vol.23
, pp. 421-427
-
-
Freeman, S.1
-
13
-
-
0026989879
-
Automatic test knowledge extraction from VHDL (ATKET)
-
P. Vishakantaiah, J. A. Abraham, and M. S. Abadir, "Automatic test knowledge extraction from VHDL (ATKET)," in Design Automation Conference, 1992, pp. 273-278.
-
(1992)
Design Automation Conference
, pp. 273-278
-
-
Vishakantaiah, P.1
Abraham, J.A.2
Abadir, M.S.3
-
14
-
-
0032183485
-
RTL test justification and propagation analysis for modular designs
-
Y. Makris and A. Orailoglu, "RTL test justification and propagation analysis for modular designs," Journal of Electronic Testing: Theory and Applications, vol. 13, no. 2, pp. 105-120, 1998.
-
(1998)
Journal of Electronic Testing: Theory and Applications
, vol.13
, Issue.2
, pp. 105-120
-
-
Makris, Y.1
Orailoglu, A.2
-
15
-
-
0032318129
-
DFT guidance through RTL test justification and propagation analysis
-
Y. Makris and A. Orailoglu, "DFT guidance through RTL test justification and propagation analysis," in International Test Conference, 1998, pp. 668-677.
-
(1998)
International Test Conference
, pp. 668-677
-
-
Makris, Y.1
Orailoglu, A.2
-
16
-
-
0027072656
-
HITEC: A test generation package for sequential circuits
-
T. Niermann and J. H. Patel, "HITEC: A test generation package for sequential circuits," in European Conference on Design Automation, 1992, pp. 214-218.
-
(1992)
Conference on Design Automation
, pp. 214-218
-
-
Niermann, T.1
Patel, J.H.2
-
18
-
-
0343826160
-
RT-level ITC 99 benchmarks and first ATPG results
-
F. Corno, M. S. Reorda, and G. Squillero, "RT-level ITC 99 benchmarks and first ATPG results," IEEE Design and Test of Computers, vol. 17, no. 3, pp. 44-53, 2000.
-
(2000)
IEEE Design and Test of Computers
, vol.17
, Issue.3
, pp. 44-53
-
-
Corno, F.1
Reorda, M.S.2
Squillero, G.3
|