Fault models and test generation for IDDQ testing

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2000, Pages 509-514

  Higami, Yoshinobu ^a   Takamatsu, Yuzo ^a   Saluja, Kewal K ^b   Kinoshita, Kozo ^c  

^a EHIME UNIVERSITY   (Japan)

^b UNIVERSITY OF WISCONSIN MADISON   (United States)

^c OSAKA UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

FAULT MODEL; FAULT SIMULATION METHOD; IDDQ TESTING; PAPER SURVEYS; RECENT RESEARCHES; TEST COMPACTION; TEST GENERATIONS; TEST VECTORS;

COMPUTER AIDED DESIGN;

EID: 2942584616     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/368434.368773     Document Type: Conference Paper

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