Response compaction with any number of unknowns using a new LFSR architecture

Proceedings - Design Automation Conference

Volumn , Issue , 2005, Pages 117-122

  Volkerink, Erik H ^a,b   Mitra, Subhasish ^b,c  

^a AGILENT LABORATORIES   (United States)

^b INTEL CORPORATION   (United States)

^c Stanford University   (United States)

Author keywords

BIST; Compression; LFSR; VLSI Test; X compact

Indexed keywords

BUILT-IN SELF TEST; COMPUTER ARCHITECTURE; DATA REDUCTION; DATA STORAGE EQUIPMENT; VLSI CIRCUITS;

COMPRESSION; LFSR; VLSI TESTS; X-COMPACT;

FORMAL LOGIC;

EID: 27944493937     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/dac.2005.193784     Document Type: Conference Paper

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