Ultra low-power neural inspired addition: When serial might outperform parallel architectures

Lecture Notes in Computer Science

Volumn 3512, Issue , 2005, Pages 486-493

  Beiu, Valeriu ^a   Djupdal, Asbjørn ^b   Aunet, Snorre ^c  

^a WASHINGTON STATE UNIVERSITY   (United States)

^b NORWEGIAN UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Norway)

^c UNIVERSITY OF OSLO   (Norway)

Author keywords

[No Author keywords available]

Indexed keywords

ARTIFICIAL INTELLIGENCE; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; LOGIC GATES; NEURAL NETWORKS;

PARALLEL ADDERS; RIPPLE CARRY ADDERS; THRESHOLD LOGIC GATES;

ADDERS;

EID: 25144486639     PISSN: 03029743     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1007/11494669_60     Document Type: Conference Paper

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