Polylithic integration of electrical and optical interconnect technologies for gigascale fiber-to-the-chip communication

IEEE Transactions on Advanced Packaging

Volumn 28, Issue 3, 2005, Pages 421-433

  Mule, Anthony V ^a,b   Villalaz, Ricardo A ^b   Joseph, Paul Jayachandran ^b,c   Naeemi, Azad ^b   Kohl, Paul A ^b,c   Gaylord, Thomas K ^b,d   Meindl, James D ^b,d  

^a INTEL CORPORATION   (United States)

^b GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^c Georgia Institute of Technology   (United States)

^d GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

High speed interconnects; Integrated optics; Optical; Optical interconnects; Optoelectronic packaging; System level

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRONICS PACKAGING; INTEGRATED OPTICS; OPTICAL COMMUNICATION; OPTICAL FIBER COUPLING; OPTICAL INTERCONNECTS; OPTICAL WAVEGUIDES; PRINTED CIRCUIT BOARDS;

HIGH SPEED INTERCONNECTS; OPTOELECTRONIC PACKAGING; POLYLITHIC INTEGRATION;

INTEGRATED OPTOELECTRONICS;

EID: 24644488920     PISSN: 15213323     EISSN: None     Source Type: Journal    
DOI: 10.1109/TADVP.2005.847838     Document Type: Article

References (30)

1. J. W. Goodman, F. J. Leonberger, S. C. Kung, and R. A. Athale, "Optical interconnections for VLSI systems," Proc. IEEE, vol. 72, no. 7, pp. 850-866, Jul. 1984.
2. 1-x/Si and Ge substrates," J. Appl. Phys., vol. 87, pp 2618-2628, Mar. 2000.
3. L. C. Kimerling, "Silicon microphotonics," Appl. Surf. Sci., vol. 159-160, pp. 8-13, Jun. 2000.
4. A. Liu, R. Jones, L. Liao, D. Samara-Rubio, D. Rubin, O. Cohen, R. Nicolaescu, and M. Paniccia, "A high-speed silicon optical modulator based on a metal-oxide capacitor," Nature, vol. 427, pp. 615-617, Feb. 2004.
5. J. M. London, A. H. Loomis, J. F. Ahadian, and C. F. Fonstad, "Preparation of silicon-on-gallium arsenide wafers for monolithic optoelectronic integration," IEEE Photon, Technol. Lett., vol. 11, no. 8, pp. 958-960, Aug. 1998.
6. T. Nakahara, H. Tsuda, K. Tateno, S. Matsuo, and T. Kurokawa, "Hybrid integration of smart pixels by using polyimide bonding: demonstration of a GaAs p-i-n photodiode/CMOS receiver," IEEE J. Selected Topics Quantum Electron., vol. 5, no. 2, pp. 209-216, Mar./Apr. 1999.
7. K. W. Goossen, J. A. Walker, L. A. D'asaro, S. P. Hui, B. Tseng, R. Leibenguth, D. Kossives, D. D. Bacon, D. Dahringer, L. M. F. Chirovsky, A. L. Lentine, and D. A. B. Miller, "GaAs MQW modulators integrated with silicon CMOS," IEEE Photon. Technol. Lett., vol. 7, no. 4, pp. 360-362, Apr. 1995.
8. A. V. Krishnamoorthy, L. M. F. Chirovsky, W. S. Hobson, R. E. Leibenguth, S. P. Hui, G. J. Zydnik, K. W. Goossen, J. D. Wynn, B. J. Tseng, J. Lopata, J. A. Walker, J. E. Cunningham, and L. A. D'asaro, "Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits," IEEE Photon. Technol. Lett., vol. 11, no. 1, pp. 128-130, Jan. 1999.
9. E. Yablonovitch, E. Kapon, T. J. Gmitter, C. P. Yun, and R. Bhat, "Double heterostructure GaAs/AlGaAs thin film diode lasers on glass substrates," IEEE Photon. Technol. Lett., vol. 1, no. 2, pp. 41-42, Feb. 1989.
10. C. Camperi-Ginestet, M. Hargis, N. M. Jokerst, and M. Allen, "Alignable epitaxial liftoff of GaAs materials with selective deposition using polyimide diaphragms," IEEE Trans. Photon. Technol. Lett., vol. 3, no. 12, pp. 1123-1126, Dec. 1991.
11. S. W. Bond, O. Vendier, M. Lee, S. Jung, M. Vrazel, A. Lopez-Lagunas, S. Chal, G. Dagnall, M. Brooke, N. M. Jokerst, D. Scott Wills, and A. S. Brown, "A three-layer 3-D silicon system using through-Si vertical optical interconnections and Si CMOS hybrid building blocks," IEEE J. Select Topics Quantum Electron., vol. 5, no. 2, pp. 276-286, Mar./Apr. 1999.
12. S. Seo, K. K. Lee, S. Kang, S, Huang, W. A. Doolittle, N. M. Jokerst, A. S. Brown, and M. A. Brooke, "The heterogeneous integration of GaN thin-film metal-semiconductor-metal photodetectors on silicon," IEEE Photon. Technol. Lett., vol. 14, no. 2, pp. 185-187, Feb. 2002.
13. M. S. Bakir, H. A. Reed, H. D. Thacker, C. S. Patel, P. A. Kohl, K. P. Martin, and J. D. Meindi, "Sea Of Leads (SOL) ultrahigh density wafer-level chip input/output interconnections for Gigascale Integration (GSI)," IEEE Trans. Electron Dev., vol. 50, no. 10, pp. 2039-2048, Oct. 2003.
14. D. B. Schwartz, C. K. Y. Chun, B. M. Foley, D. H. Hartman, M. Lebby, H. C. Lee, C. L. Shieh, S. M. Kuo, S. G. Shook, and B. Webb, "A low-cost high-performance optical interconnect," IEEE. Trans. Compon., Packag., Manuf. Technol. B, vol. 19, no. 3, pp. 532-539, Aug. 1996.
15. L. J. Norton, F. Carney, N. Choi, C. K. Y. Chun, R. K. Denton Jr., D. Diaz, J. Knapp, M. Meyering, C. Ngo, S. Planer, G. Raskin, E. Reyes, J. Sauvageau, D. B. Schwartz, S. G. Shook, J. Yoder, and Y. Wen, "Optobus I: a production parallel fiber optical interconnect," in Proc. IEEE Electronic Components Technology Conf., San Jose, CA, May 1997, pp. 204-209.
16. J. Grula, Optobus Technology, corporate presentation.
17. Y.-M. Wong, D. J. Muehlner, C. C. Faudskar, D. B. Buchholz, M. Fishteyn, J. L. Brandner, W. J. Parzygnat, R. A. Morgan, T. Mullally, R. E. Leibenguth, G. D. Guth, M. W. Focht, K. G. Glogovsky, J. L. Zilko, J. V. Gates, P. J. Anthony, B. H. Tyrone, T. J. Ireland, D. H. Lewis, D. F. Smith, S. F. Nail, D. K. Lewis, D. L. Rogers, H. A. Aispain, S. M. Gowda, S. G. Walker, Y. H. Kwark, R. J. S. Bates, D. M. Kuchta, and J. D. Crow, "Technology development of a high-density 32-channel 16-Gb/s optical data link for optical interconnection applications for the Optoelectronic Technology Consortium (OETC)," J. Lightw. Technol., vol. 13, pp. 995-1016, Jun. 1995.
18. K. H. Hahn, K. S. Giboney, R. E. Wilson, J. Straznicky, E. G. Wong, M. R. Tan, R. T. Kaneshiro, D. W. Dolfi, E. H. Mueller, A. E. Plotts, D. D. Murray, J. E. Marchegiano, B. L. Booth, B. J. Sano, B. Madhaven, B. Raghavan, and A. F. J. Levi, "Gigabytes/s data communications with the POLO parallel optical link," in Proc. IEEE Electronic Components Technology Conf., Orlando, FL, May 1996, pp. 28-31.
19. K. H. Hahn, "POLO- parallel optical links for gigabyte data communications," in Proc. IEEE Electronic Components Technology Conf., Las Vegas, NV, May 1995, pp. 21-24.
20. L. Buckman, A. Yuen, K. Giboney, P. Rosenberg, J. Straznicky, K. Wu, and D. Dolfi, "Parallel optical interconnects," in Proc. Lasers Electro-Optics Conf., San Francisco, CA, May 2000, pp. 535-536.
21. Critical Design Guidelines for Successful Application of Parallel Fiber-Optic Modules HFBR-712BP transmitter and HFBR-722BP receiver specifications sheet, www.agilent.com [Online]
22. K. Drogemuller, D. Kuhl, J. Blank, M. Ehlert, T. Kraeker, J. Hohn, D. Klix, V. Plickert, L. Melchior, I. Schmale, P. Hildebrandt, M. Heinemann, F. P. Schiefelbein, L. Leininger, H.-D. Wolf, T. Wipiejewski, and A. Ebberg, "Current progress of advanced high speed parallel optical links for computer clusters and switching systems," in Proc. IEEE Electronic Components Technology Conf., Las Vegas, NV, May 2000, pp. 1227-1235.
23. K. Katsura, M. Usui, N. Sato, A. Ohki, N. Tanaka, N. Matsuura, T. Kagawa, K. Tateno, M. Hikita, R. Yoshimura, and Y. Ando, "Packaging for a 40-channel parallel optical interconnection module with an over-25 Gbit/s throughput," IEEE Trans. Adv. Packag., vol. 22, no. 4, pp. 551-560, Nov. 1999.
24. M. Usui, N. Sato, A. Ohki, N. Matsuura, N. Tanaka, K. Enbutsu, M. Amano, M. Hikita, T. Kagawa, K. Katsura, and Y. Ando, "Parabit-1: 60 Gb/ s-throughput parallel optical interconnect module," in Proc. IEEE Electronic Components Technology Conf., Las Vegas, NV, May 2000, pp. 1252-1258.
25. A. Naeemi, P. Zarkesh-Ha, C. S. Patel, and J. D. Meindl, "Performance improvement using on-board wires for on-chip interconnects," in Proc. IEEE 9th Topical Meeting Electrical Performance Electronic Packaging, Scottsdale, AZ, Oct. 2000, pp. 325-328.
26. A. Naeemi, J. Xu, A. V. Mule, T. K. Gaylord, and J. D. Meindl, "Optical and electrical interconnect partition length based on chip-to-chip bandwidth maximization," IEEE Photon. Technol. Lett., vol. 16, pp. 1221-1223, Apr. 2004.
27. 2003 International Technology Roadmap for Semiconductors, 2003.
28. H. A. Reed, M. S. Bakir, C. S. Patel, K. P. Martin, J. D. Meindl, and P. A. Kohl, "Compliant wafer-level package (CWLP) with embedded airgaps for sea of leads interconnections," in Proc. IEEE Int. Interconnect Technology Conf., San Francisco, CA, Jun. 2001, pp. 151-153.
29. S. M. Schultz, E. N. Glytsis, and T. K. Gaylord, "Volume grating preferential-order focusing waveguide coupler," Opt. Lett., vol. 24, pp. 1708-1710, Dec. 1999.
30. A. V. Mule, R. Villalaz, T. K. Gaylord, and J. D. Meindl, "Quasifree-space optical coupling between diffraction grating couplers fabricated on independent substrates," Appl. Opt., vol. 43, pp. 5468-5475, Oct. 2004.