Preparation of silicon-on-gallium arsenide wafers for monolithic optoelectronic integration

IEEE Photonics Technology Letters

Volumn 11, Issue 8, 1999, Pages 958-960

  London, Joanna M ^a   Loomis, Andrew H ^b   Ahadian, Joseph F ^a   Fonstad Jr , Clifton G ^a  

^a Department of Electrical Engineering and Computer Science   (United States)

^b MIT LINCOLN LABORATORY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; INTEGRATED OPTOELECTRONICS; MOLECULAR BEAM EPITAXY; OPTOELECTRONIC DEVICES; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION; SEMICONDUCTING GALLIUM ARSENIDE; SEMICONDUCTOR LASERS; SILICON ON INSULATOR TECHNOLOGY; SILICON ON SAPPHIRE TECHNOLOGY; SINGLE CRYSTALS; THERMAL EXPANSION;

EPITAXY ON ELECTRONICS; SEPARATION BY IMPLANTATION OF OXYGEN; WAFER BONDING;

SILICON WAFERS;

EID: 0032689234     PISSN: 10411135     EISSN: None     Source Type: Journal    
DOI: 10.1109/68.775312     Document Type: Article

References (3)

1. S. F. Fang, K. Adomi, S. Iyer, H. Morkoc, H. Zabel, C. Choi, and N. Otsuka, "Gallium arsenide and other compound semiconductors on silicon," J. Appl. Phys., vol. 68 pp. R31-58, 1990.
2. J. P. Colinge, Silicon-on-Insulator Technology: Materials to VLSI, 2nd ed. Boston, MA: Kluwer, 1997.
3. J. F. Ahadian and C. G. Fonstad, Jr., "Epitaxy-on-electronics technology for monolithic optoelectronic integration: Foundations, development, and status," Opt. Eng., vol. 37, pp. 3161-3174, 1999.