-
1
-
-
0035394098
-
On the effective deployment of functional formal verification
-
Abarbanel-Vinov Y, Aizenbud-Reshef N, Beer I, Eisner C, Geist D, Heyman T, Reuveni I, Rippel E, Shitsevalov I, Wolfsthal Y, Yatzkar-Haham T (2001) On the effective deployment of functional formal verification. Formal Methods in System Design 19(1):35-44
-
(2001)
Formal Methods in System Design
, vol.19
, Issue.1
, pp. 35-44
-
-
Abarbanel-Vinov, Y.1
Aizenbud-Reshef, N.2
Beer, I.3
Eisner, C.4
Geist, D.5
Heyman, T.6
Reuveni, I.7
Rippel, E.8
Shitsevalov, I.9
Wolfsthal, Y.10
Yatzkar-Haham, T.11
-
2
-
-
0019598045
-
On correct refinement of programs
-
August
-
Back R (1981) On correct refinement of programs. Journal of Computer and Systems Sciences 23(1):49-68, August
-
(1981)
Journal of Computer and Systems Sciences
, vol.23
, Issue.1
, pp. 49-68
-
-
Back, R.1
-
3
-
-
84947232436
-
Bebop: A symbolic model checker for boolean programs
-
LNCS Springer-Verlag
-
Ball T, Rajamani SK (2000) Bebop: A symbolic model checker for boolean programs. In: Proc. 7 th International SPIN Workshop, LNCS, vol 1885. Springer-Verlag
-
(2000)
Proc. 7th International SPIN Workshop
, vol.1885
-
-
Ball, T.1
Rajamani, S.K.2
-
4
-
-
84957107028
-
Model checking the IBM Gigahertz Processor: An abstraction algorithm for high-performance netlists
-
LNCS Springer-Verlag
-
Baumgartner J, Heyman T, Singhal V, Aziz A (1999) Model checking the IBM Gigahertz Processor: An abstraction algorithm for high-performance netlists. In: Proc. 11 th International Conference on Computer Aided Verification (CAV), LNCS, vol 1633. Springer-Verlag, pp 72-83
-
(1999)
Proc. 11th International Conference on Computer Aided Verification (CAV)
, vol.1633
, pp. 72-83
-
-
Baumgartner, J.1
Heyman, T.2
Singhal, V.3
Aziz, A.4
-
5
-
-
84958756507
-
The temporal logic Sugar
-
Berry G, Comon H, Finkel A (eds) LNCS Springer-Verlag
-
Beer I, Ben-David S, Eisner C, Fisman D, Gringauze A, Rodeh Y (2001) The temporal logic Sugar. In: Berry G, Comon H, Finkel A (eds) Proc. 13 th International Conference on Computer Aided Verification (CAV), LNCS, vol 2102. Springer-Verlag, pp 363-367
-
(2001)
Proc. 13 Th International Conference on Computer Aided Verification (CAV)
, vol.2102
, pp. 363-367
-
-
Beer, I.1
Ben-David, S.2
Eisner, C.3
Fisman, D.4
Gringauze, A.5
Rodeh, Y.6
-
6
-
-
84947431894
-
RuleBase: Model checking at IBM
-
LNCS Springer-Verlag
-
Beer I, Ben-David S, Eisner C, Geist D, Gluhovsky L, Heyman T, Landver A, Paanah P, Rodeh Y, Ronin G, Wolfsthal Y (1997) RuleBase: Model checking at IBM. In: Proc. 9th International Conference on Computer Aided Verification (CAV), LNCS, vol 1254. Springer-Verlag, pp 480-483
-
(1997)
Proc. 9th International Conference on Computer Aided Verification (CAV)
, vol.1254
, pp. 480-483
-
-
Beer, I.1
Ben-David, S.2
Eisner, C.3
Geist, D.4
Gluhovsky, L.5
Heyman, T.6
Landver, A.7
Paanah, P.8
Rodeh, Y.9
Ronin, G.10
Wolfsthal, Y.11
-
7
-
-
0029724077
-
RuleBase: An industry-oriented formal verification tool
-
Association for Computing Machinery, Inc., June
-
Beer I, Ben-David S, Eisner C, Landver A (1996) RuleBase: An industry-oriented formal verification tool. In: Proc. 33 rd Design Automation Conference (DAC). Association for Computing Machinery, Inc., June, pp 655-660
-
(1996)
Proc. 33rd Design Automation Conference (DAC)
, pp. 655-660
-
-
Beer, I.1
Ben-David, S.2
Eisner, C.3
Landver, A.4
-
8
-
-
0032027829
-
A formal verification environment for railway signaling system design
-
March
-
Bernardeschi C, Fantechi A, Gnesi S, LaRosa S, Mongardi G, Romano D (1998) A formal verification environment for railway signaling system design. Formal Methods in System Design 12(2), March
-
(1998)
Formal Methods in System Design
, vol.12
, Issue.2
-
-
Bernardeschi, C.1
Fantechi, A.2
Gnesi, S.3
LaRosa, S.4
Mongardi, G.5
Romano, D.6
-
10
-
-
0032121284
-
Model checking large software specifications
-
July
-
Chan W, Anderson RJ, Beame P, Burns S, Modugno F, Notkin D, Reese JD (1998) Model checking large software specifications. IEEE Transactions on Software Engineering 24(7):498-520, July
-
(1998)
IEEE Transactions on Software Engineering
, vol.24
, Issue.7
, pp. 498-520
-
-
Chan, W.1
Anderson, R.J.2
Beame, P.3
Burns, S.4
Modugno, F.5
Notkin, D.6
Reese, J.D.7
-
11
-
-
0003372722
-
Characterizing correctness properties of parallel programs as fixpoints
-
LNCS Springer-Verlag
-
Clarke E, Emerson E (1981) Characterizing correctness properties of parallel programs as fixpoints. In: Seventh International Colloquium on Automata, Languages, and Programming, LNCS, vol 85. Springer-Verlag
-
(1981)
Seventh International Colloquium on Automata, Languages, and Programming
, vol.85
-
-
Clarke, E.1
Emerson, E.2
-
12
-
-
0027734857
-
Verfication of the Futurebus+ cache coherence protocol
-
Claesen L (ed) April
-
Clarke E, Grumberg O, Hiraishi H, Jha S, Long D, McMillan K, Ness L (1993) Verfication of the Futurebus+ cache coherence protocol. In: Claesen L (ed) Proc. of the Eleventh International Symposium on Computer Hardware Description Languages and their Applications, April
-
(1993)
Proc. of The Eleventh International Symposium on Computer Hardware Description Languages and Their Applications
-
-
Clarke, E.1
Grumberg, O.2
Hiraishi, H.3
Jha, S.4
Long, D.5
McMillan, K.6
Ness, L.7
-
14
-
-
0033697422
-
Bandera: Extracting finite-state models from Java source code
-
June Proc. of the 22st International Conference on Software Engineering
-
Corbett JC, Dwyer MB, Hatcliff J, Laubach S, Pasareanu CS, Robby, Zheng H (2000) Bandera: Extracting finite-state models from Java source code. In: Proc. of the 22 st International Conference on Software Engineering, June
-
(2000)
-
-
Corbett, J.C.1
Dwyer, M.B.2
Hatcliff, J.3
Laubach, S.4
Pasareanu, C.S.5
Robby6
Zheng, H.7
-
15
-
-
23844550254
-
Modeling and validation of Java multithreading applications using SPIN
-
Proc. 4 th International SPIN Workshop
-
Demartini C, Iosif R, Sisto R (1998) Modeling and validation of Java multithreading applications using SPIN. In: Proc. 4 th International SPIN Workshop
-
(1998)
-
-
Demartini, C.1
Iosif, R.2
Sisto, R.3
-
16
-
-
23844492489
-
Slicing software for model construction
-
Proc. 1999 ACM SIGPLAN Workshop on Partial Evaluation and Semantics-Based Program Manipulation
-
Dwyer M, Hatcliff J (1999) Slicing software for model construction. In: Proc. 1999 ACM SIGPLAN Workshop on Partial Evaluation and Semantics-Based Program Manipulation
-
(1999)
-
-
Dwyer, M.1
Hatcliff, J.2
-
18
-
-
84958682971
-
Using symbolic model checking to verify the railway stations of Hoorn-Kersenboogerd and Heerhugowaard
-
Bad Herrenalb, Germany, September 1999, LNCS Springer-Verlag
-
Eisner C (1999) Using symbolic model checking to verify the railway stations of Hoorn-Kersenboogerd and Heerhugowaard. In: Proceedings 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME), Bad Herrenalb, Germany, September 1999, LNCS, vol 1703. Springer-Verlag, pp 97-109
-
(1999)
Proceedings 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME)
, vol.1703
, pp. 97-109
-
-
Eisner, C.1
-
19
-
-
0038525885
-
Model checking the garbage collection mechanism of SMV
-
Stoller SD, Visser W (eds) Elsevier Science Publishers
-
Eisner C (2001) Model checking the garbage collection mechanism of SMV. In: Stoller SD, Visser W (eds) Electronic Notes in Theoretical Computer Science, vol 55. Elsevier Science Publishers
-
(2001)
Electronic Notes in Theoretical Computer Science
, vol.55
-
-
Eisner, C.1
-
20
-
-
84896693123
-
Using symbolic CTL model checking to verify the railway stations of Hoorn-Kersenboogerd and Heerhugowaard
-
October
-
Eisner C (2002) Using symbolic CTL model checking to verify the railway stations of Hoorn-Kersenboogerd and Heerhugowaard. International Journal on Software Tools for Technology Transfer (STTT) 4(1):107-124, October
-
(2002)
International Journal on Software Tools for Technology Transfer (STTT)
, vol.4
, Issue.1
, pp. 107-124
-
-
Eisner, C.1
-
21
-
-
0033698178
-
A methodology for formal design of hardware control with application to cache coherence protocols
-
Association for Computing Machinery, Inc. June
-
Eisner C, Hoover R, Nation W, Nelson K, Shitsevalov I, Valk K (2000) A methodology for formal design of hardware control with application to cache coherence protocols. In: Proc. 37 th Design Automation Conference (DAC). Association for Computing Machinery, Inc., pp 724-729, June
-
(2000)
Proc. 37 Th Design Automation Conference (DAC)
, pp. 724-729
-
-
Eisner, C.1
Hoover, R.2
Nation, W.3
Nelson, K.4
Shitsevalov, I.5
Valk, K.6
-
23
-
-
84944409009
-
Efficient algorithms for model checking pushdown systems
-
LNCS Springer-Verlag
-
Esparza J, Hansel D, Rossmanith P, Schwoon S (2000) Efficient algorithms for model checking pushdown systems. In: Proc. 12 th International Conference on Computer Aided Verification (CAV), LNCS, vol 1855. Springer-Verlag, pp 232-247
-
(2000)
Proc. 12th International Conference on Computer Aided Verification (CAV)
, vol.1855
, pp. 232-247
-
-
Esparza, J.1
Hansel, D.2
Rossmanith, P.3
Schwoon, S.4
-
24
-
-
23844558515
-
-
Formal Methods Group IBM Haifa Research Laboratory
-
RuleBase User's Manual, Version 1.4.3 (2003) Formal Methods Group, IBM Haifa Research Laboratory
-
(2003)
RuleBase User's Manual, Version 1.4.3
-
-
-
28
-
-
0033684179
-
Formal verification of an IBM Coreconnect Processor Local Bus arbiter core
-
Association for Computing Machinery, Inc. June
-
Goel A, Lee W (2000) Formal verification of an IBM Coreconnect Processor Local Bus arbiter core. In: Proc. 37 th Design Automation Conference (DAC). Association for Computing Machinery, Inc., pp 196-200, June
-
(2000)
Proc. 37 Th Design Automation Conference (DAC)
, pp. 196-200
-
-
Goel, A.1
Lee, W.2
-
29
-
-
2542614110
-
The safety guaranteeing system at station Hoorn-Kersenboogerd
-
Logic Group Preprint Series 121, Utrecht University
-
Groote J, Koorn J, van Vlijmen S (1994) The safety guaranteeing system at station Hoorn-Kersenboogerd. Logic Group Preprint Series 121, Utrecht University
-
(1994)
-
-
Groote, J.1
Koorn, J.2
van Vlijmen, S.3
-
31
-
-
84947271391
-
Logic verification of ANSI-C code with SPIN
-
Springer-Verlag ff
-
Holzmann GJ (2000) Logic verification of ANSI-C code with SPIN. In: Proc. 7 th International SPIN Workshop, LNCS, vol 1885. Springer-Verlag, pp 224 ff
-
(2000)
Proc. 7th International SPIN Workshop, LNCS
, vol.1885
, pp. 224
-
-
Holzmann, G.J.1
-
32
-
-
0012806253
-
Software model checking: Extracting verification models from source code
-
Kluwer
-
Holzmann GJ, Smith MH (1999) Software model checking: Extracting verification models from source code. In: Proc. PSTV/FORTE99. Kluwer, pp 481-497
-
(1999)
Proc. PSTV/FORTE99
, pp. 481-497
-
-
Holzmann, G.J.1
Smith, M.H.2
-
33
-
-
19144364558
-
Bridging the e-business gap through formal verification
-
Hinchey M, Bowen J (eds) Springer-Verlag
-
Kesten Y, Klein A, Pnueli A, Raanan G (1999) Bridging the e-business gap through formal verification. In: Hinchey M, Bowen J (eds) Industrial-Strength Formal Methods in Practice. Springer-Verlag, pp 117-137
-
(1999)
Industrial-Strength Formal Methods in Practice
, pp. 117-137
-
-
Kesten, Y.1
Klein, A.2
Pnueli, A.3
Raanan, G.4
-
34
-
-
0033099317
-
Model-based verification of a security protocol for conditional access to services
-
March
-
Leduc G, Bonaventure O, Léonard L, Koerner E, Pecheur C (1999) Model-based verification of a security protocol for conditional access to services. Formal Methods in System Design 14(2), March
-
(1999)
Formal Methods in System Design
, vol.14
, Issue.2
-
-
Leduc, G.1
Bonaventure, O.2
Léonard, L.3
Koerner, E.4
Pecheur, C.5
-
40
-
-
0023558869
-
A theoretical basis for stepwise refinement and the programming calculus
-
December
-
Morris J (1987) A theoretical basis for stepwise refinement and the programming calculus. Science of Computer Programming 9(3):287-306, December
-
(1987)
Science of Computer Programming
, vol.9
, Issue.3
, pp. 287-306
-
-
Morris, J.1
-
42
-
-
19144364370
-
Formal verification of an MPEG decoder chip: A case study in the industrial use of formal methods
-
(a post CAV-2000 workshop), Chicago, July
-
Parash A (2000) Formal verification of an MPEG decoder chip: A case study in the industrial use of formal methods. In: Proceedings of the Workshop on Advances in Verification (WAVe), (a post CAV-2000 workshop), Chicago, July
-
(2000)
Proceedings of the Workshop on Advances in Verification (WAVe)
-
-
Parash, A.1
-
43
-
-
0020299274
-
Specification and verification of concurrent systems in CESAR
-
Springer-Verlag LNCS
-
Queille J, Sifakis J (1982) Specification and verification of concurrent systems in CESAR. In: Proc. International Symposium in Programming, LNCS, vol 137. Springer-Verlag, pp 337-351
-
(1982)
Proc. International Symposium in Programming
, vol.137
, pp. 337-351
-
-
Queille, J.1
Sifakis, J.2
-
44
-
-
0343024318
-
Hints to accelerate symbolic traversal
-
Bad Herrenalb, Germany, September, LNCS Springer-Verlag
-
Ravi K, Somenzi F (1999) Hints to accelerate symbolic traversal. In: Proceedings 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME), Bad Herrenalb, Germany, September, LNCS, vol 1703. Springer-Verlag
-
(1999)
Proceedings 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME)
, vol.1703
-
-
Ravi, K.1
Somenzi, F.2
-
46
-
-
84947247929
-
Model-checking multi-threaded distributed Java programs
-
LNCS Springer-Verlag ff
-
Stoller SD (2000) Model-checking multi-threaded distributed Java programs. In: Proc. 7 th International SPIN Workshop, LNCS, vol 1885. Springer-Verlag, pp 224 ff
-
(2000)
Proc. 7th International SPIN Workshop
, vol.1885
, pp. 224
-
-
Stoller, S.D.1
-
47
-
-
0000990322
-
A survey of program slicing techniques
-
Tip F (1995) A survey of program slicing techniques. Journal of Programming Languages 3(3):121-189
-
(1995)
Journal of Programming Languages
, vol.3
, Issue.3
, pp. 121-189
-
-
Tip, F.1
-
48
-
-
84960853881
-
Model checking programs
-
Grenoble, France, September
-
Visser W, Havelund K, Brat G, Park S (2000) Model checking programs. In: Proc. of the 15 th International Conference on Automated Software Engineering, Grenoble, France, September
-
(2000)
Proc. of the 15th International Conference on Automated Software Engineering
-
-
Visser, W.1
Havelund, K.2
Brat, G.3
Park, S.4
|