-
1
-
-
84896864729
-
-
http://rep1.iei.pi.cnr.it/projects/JACK
-
-
-
-
2
-
-
84957107028
-
Model checking the IBM Gigahertz Processor: An abstraction algorithm for high-performance netlists
-
LNCS 1633. Berlin, Heidelberg, New York: Springer-Verlag
-
Baumgartner, J., Heyman, T., Singhal, V., Aziz, A.: Model checking the IBM Gigahertz Processor: an abstraction algorithm for high-performance netlists. In: Proc. 11th International Conference on Computer Aided Verification (CAV). LNCS 1633. Berlin, Heidelberg, New York: Springer-Verlag, 1999, pp. 72-83
-
(1999)
Proc. 11th International Conference On Computer Aided Verification (CAV)
, pp. 72-83
-
-
Baumgartner, J.1
Heyman, T.2
Singhal, V.3
Aziz, A.4
-
3
-
-
0029724077
-
RuleBase: An industry-oriented formal verification tool
-
ACM, June
-
Beer, I., Ben-David, S., Eisner, C., Landver, A.: RuleBase: an industry-oriented formal verification tool. In: Proc. 33rd Design Automation Conference (DAC), pp. 655-660. ACM, June, 1996
-
(1996)
Proc. 33rd Design Automation Conference (DAC)
, pp. 655-660
-
-
Beer, I.1
Ben-David, S.2
Eisner, C.3
Landver, A.4
-
4
-
-
84863884631
-
On-the-fly model checking of RCTL formulas
-
LNCS 1427. Berlin, Heidelberg, New York: Springer-Verlag
-
Beer, I., Ben-David, S., Landver, A.: On-the-fly model checking of RCTL formulas. In: Proc. 10th International Conference on Computer Aided Verification (CAV). LNCS 1427. Berlin, Heidelberg, New York: Springer-Verlag, 1998, pp. 184-194
-
(1998)
Proc. 10th International Conference On Computer Aided Verification (CAV)
, pp. 184-194
-
-
Beer, I.1
Ben-David, S.2
Landver, A.3
-
5
-
-
0032027829
-
A formal verification environment for railway signaling system design
-
Bernardeschi, C., Fantechi, A., Gnesi, S., LaRosa, S., Mongardi, G., Romano, D.: A formal verification environment for railway signaling system design. Formal Methods Syst Design 12(2), 1998
-
(1998)
Formal Methods Syst Design
, vol.12
, Issue.2
-
-
Bernardeschi, C.1
Fantechi, A.2
Gnesi, S.3
Larosa, S.4
Mongardi, G.5
Romano, D.6
-
6
-
-
84944319371
-
Symbolic model checking without BDDs
-
LNCS 1579. Berlin, Heidelberg, New York: Springer-Verlag
-
Biere, A., Cimatti, A., Clarke, E., Zhu, Y.: Symbolic model checking without BDDs. In: Proc. 5th International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS). LNCS 1579. Berlin, Heidelberg, New York: Springer-Verlag, 1999
-
(1999)
Proc. 5th International Conference On Tools and Algorithms For the Construction and Analysis of Systems (TACAS)
-
-
Biere, A.1
Cimatti, A.2
Clarke, E.3
Zhu, Y.4
-
7
-
-
0034206420
-
Verifying temporal properties of reactive systems: A STeP tutorial
-
Bjørner, N., Browne, A., Colón, M., Finkbeiner, B., Manna, Z., Sipma, H., Uribe, T.: Verifying temporal properties of reactive systems: a STeP tutorial. Formal Methods Syst Design 16(3), 2000
-
(2000)
Formal Methods Syst Design
, vol.16
, Issue.3
-
-
Bjørner, N.1
Browne, A.2
Colón, M.3
Finkbeiner, B.4
Manna, Z.5
Sipma, H.6
Uribe, T.7
-
8
-
-
13944264619
-
Formal verification in railways
-
In: Hinchey, M., Bowen, J. (eds.), Berlin, Heidelberg, New York: Springer-Verlag
-
Borälv, A., Stålmarck, G.: Formal verification in railways. In: Hinchey, M., Bowen, J. (eds.): Industrial-strength formal methods in practice, pp. 329-350. Berlin, Heidelberg, New York: Springer-Verlag, 1999
-
(1999)
Industrial-strength Formal Methods In Practice
, pp. 329-350
-
-
Borälv, A.1
Stålmarck, G.2
-
9
-
-
0022769976
-
Graph-based algorithms for Boolean function manipulation
-
Bryant, R.: Graph-based algorithms for Boolean function manipulation. IEEE Trans Comput C-35(8), 1986
-
(1986)
IEEE Trans Comput
, vol.C-35
, Issue.8
-
-
Bryant, R.1
-
10
-
-
84944385106
-
Improving efficiency of symbolic model checking for state-based system requirements
-
ACM, March
-
Chan, W., Anderson, R., Beame, P., Notkin, D.: Improving efficiency of symbolic model checking for state-based system requirements. In: Proc. 1998 International Symposium on Software Testing and Analysis (ISSTA). ACM, March, 1998
-
(1998)
Proc. 1998 International Symposium on Software Testing and Analysis (ISSTA)
-
-
Chan, W.1
Anderson, R.2
Beame, P.3
Notkin, D.4
-
11
-
-
84957051961
-
The mathematical foundation of symbolic trajectory evaluation
-
LNCS 1633. Berlin, Heidelberg, New York: Springer-Verlag
-
Chou, C.: The mathematical foundation of symbolic trajectory evaluation. In: Proc. 11th International Conference on Computer Aided Verification (CAV). LNCS 1633. Berlin, Heidelberg, New York: Springer-Verlag, 1999, pp. 196-207
-
(1999)
Proc. 11th International Conference On Computer Aided Verification (CAV
, pp. 196-207
-
-
Chou, C.1
-
12
-
-
0003372722
-
Characterizing correctness properties of parallel programs as fixpoints
-
LNCS 85. Berlin, Heidelberg, New York: Springer-Verlag
-
Clarke, E., Emerson, E.: Characterizing correctness properties of parallel programs as fixpoints. In: 7th International Colloquium on Automata, Languages, and Programming. LNCS 85. Berlin, Heidelberg, New York: Springer-Verlag, 1981
-
(1981)
7th International Colloquium On Automata, Languages, and Programming
-
-
Clarke, E.1
Emerson, E.2
-
13
-
-
85037030721
-
Design and synthesis of synchronization skeletons using branching time temporal logic
-
LNCS 131. Berlin, Heidelberg, New York: Springer-Verlag
-
Clarke, E., Emerson, E.: Design and synthesis of synchronization skeletons using branching time temporal logic. In: Proc. Workshop on Logics of Programs. LNCS 131. Berlin, Heidelberg, New York: Springer-Verlag, 1981, pp. 52-71
-
(1981)
Proc. Workshop On Logics of Programs
, pp. 52-71
-
-
Clarke, E.1
Emerson, E.2
-
14
-
-
0029238629
-
Efficient generation of counterexamples and witnesses in symbolic model checking
-
ACM, June
-
Clarke, E., Grumberg, O., McMillan, K., Zhao, X.: Efficient generation of counterexamples and witnesses in symbolic model checking. In: Proc. 32nd Design Automation Conference (DAC), pp. 427-432. ACM, June, 1995
-
(1995)
Proc. 32nd Design Automation Conference (DAC)
, pp. 427-432
-
-
Clarke, E.1
Grumberg, O.2
McMillan, K.3
Zhao, X.4
-
15
-
-
0003962322
-
-
MIT, Mass., USA
-
Clarke, E., Grumberg, O., Peled, D.: Model Checking. MIT, Mass., USA, 1999
-
(1999)
Model Checking
-
-
Clarke, E.1
Grumberg, O.2
Peled, D.3
-
18
-
-
84948988996
-
The formal design of 1M-gate ASICs
-
., LNCS 1522. Berlin, Heidelberg, New York: Springer-Verlag
-
Eiríksson, Á.: The formal design of 1M-gate ASICs. In: 2nd International Conference on Formal Methods in Computer- Aided Design (FMCAD). LNCS 1522. Berlin, Heidelberg, New York: Springer-Verlag, 1998, pp. 49-63
-
(1998)
2nd International Conference On Formal Methods In Computer- Aided Design (FMCAD)
, pp. 49-63
-
-
Eiríksson, Á.1
-
20
-
-
0033698178
-
A methodology for formal design of hardware control with application to cache coherence protocols
-
ACM, June
-
Eisner, C., Hoover, R., Nation, W., Nelson, K., Shitsevalov, I., Valk K.: A methodology for formal design of hardware control with application to cache coherence protocols. In: Proc. 37th Design Automation Conference (DAC), pp. 724-729. ACM, June, 2000
-
(2000)
Proc. 37th Design Automation Conference (DAC)
, pp. 724-729
-
-
Eisner, C.1
Hoover, R.2
Nation, W.3
Nelson, K.4
Shitsevalov, I.5
Valk, K.6
-
23
-
-
55549130829
-
Verification of interlockings: From control tables to ladder logic diagrams
-
In: Groote,J., Luttik, S., van Wamel, J. (eds.), Amsterdam, May, Stichting Mathematisch Centrum
-
Fokkink, W., Hollingshead, P.: Verification of interlockings: from control tables to ladder logic diagrams. In: Groote,J., Luttik, S., van Wamel, J. (eds.): Proc. 3rd Workshop on Formal Methods for Industrial Critical Systems (FMICS), pp. 171-185, Amsterdam, May 1998. Stichting Mathematisch Centrum
-
(1998)
Proc. 3rd Workshop On Formal Methods For Industrial Critical Systems (FMICS
, pp. 171-185
-
-
Fokkink, W.1
Hollingshead, P.2
-
24
-
-
84968448732
-
Efficient model checking by automated ordering of transition relation partitions
-
LNCS 818. Berlin, Heidelberg, New York: Springer-Verlag
-
Geist, D., Beer, I.: Efficient model checking by automated ordering of transition relation partitions. In: Proc. 6th International Conference on Computer Aided Verification (CAV). LNCS 818. Berlin, Heidelberg, New York: Springer-Verlag, 1994, pp. 299-310
-
(1994)
Proc. 6th International Conference On Computer Aided Verification (CAV)
, pp. 299-310
-
-
Geist, D.1
Beer, I.2
-
25
-
-
0033684179
-
Formal verification of an IBM Coreconnect Processor Local Bus arbiter core
-
ACM, June
-
Goel, A., Lee, W.: Formal verification of an IBM Coreconnect Processor Local Bus arbiter core. In: Proc. 37th Design Automation Conference (DAC), pp. 196-200. ACM, June, 2000
-
(2000)
Proc. 37th Design Automation Conference (DAC)
, pp. 196-200
-
-
Goel, A.1
Lee, W.2
-
29
-
-
2542614110
-
-
Logic Group Preprint Series 121, Utrecht University
-
Groote, J., Koorn, J., van Vlijmen, S.: The safety guaranteeing system at station Hoorn-Kersenboogerd. Logic Group Preprint Series 121, Utrecht University, 1994
-
(1994)
The Safety Guaranteeing System At Station Hoorn-Kersenboogerd
-
-
Groote, J.1
Koorn, J.2
van Vlijmen, S.3
-
30
-
-
0034140365
-
The propositional formula checker HeerHugo
-
Groote, J., Warners, J.: The propositional formula checker HeerHugo. J Autom Reasoning 24(1/2): 101-125, 2000
-
(2000)
J Autom Reasoning
, vol.24
, Issue.1-2
, pp. 101-125
-
-
Groote, J.1
Warners, J.2
-
33
-
-
0026882239
-
On the OBDD-representation of general Boolean functions
-
Liaw, H., Lin, C.: On the OBDD-representation of general Boolean functions. IEEE Trans Comput 41(6), 1992
-
(1992)
IEEE Trans Comput
, vol.41
, Issue.6
-
-
Liaw, H.1
Lin, C.2
-
34
-
-
0003572108
-
-
Berlin, Heidelberg, New York: Springer- Verlag
-
Manna, Z., Pnueli, A.: Temporal verification of reactive systems: specification. Berlin, Heidelberg, New York: Springer- Verlag, 1992
-
(1992)
Temporal Verification of Reactive Systems: Specification
-
-
Manna, Z.1
Pnueli, A.2
-
35
-
-
0003572108
-
-
Berlin, Heidelberg, New York: Springer-Verlag
-
Manna, Z., Pnueli, A.: Temporal verification of reactive systems: safety. Berlin, Heidelberg, New York: Springer-Verlag, 1995
-
(1995)
Temporal Verification of Reactive Systems: Safety
-
-
Manna, Z.1
Pnueli, A.2
-
38
-
-
84896890402
-
An experience in automatic verification of railway interlocking systems
-
Brussels, Belgium
-
Petersen, J.: An experience in automatic verification of railway interlocking systems. In: Proc. QWE, Brussels, Belgium, 1998
-
Proc. QWE
, pp. 1998
-
-
Petersen, J.1
-
39
-
-
0001206576
-
Applications of temporal logic to the specification and verification of reactive systems: A survey of current trends
-
Bakker, J., et al.(eds, LNCS 224. Berlin, Heidelberg, New York: Springer-Verlag
-
Pnueli, A.: Applications of temporal logic to the specification and verification of reactive systems: a survey of current trends. In: Bakker, J., et al.(eds.): Current trends in concurrency.LNCS 224. Berlin, Heidelberg, New York: Springer-Verlag, 1986
-
(1986)
Current Trends In Concurrency
-
-
Pnueli, A.1
-
40
-
-
0020299274
-
Specification and verification of concurrent systems in CESAR
-
LNCS 137. Berlin, Heidelberg, New York: Springer-Verlag
-
Queille, J., Sifakis, J.: Specification and verification of concurrent systems in CESAR. In: Proc. International symposium in Programming. LNCS 137. Berlin, Heidelberg, New York: Springer-Verlag, 1982, pp. 337-351
-
(1982)
Proc. International Symposium In Programming
, pp. 337-351
-
-
Queille, J.1
Sifakis, J.2
-
41
-
-
0343024318
-
Hints to accelerate symbolic traversal
-
LNCS 1703. Berlin, Heidelberg, New York: Springer-Verlag
-
Ravi, K., Somenzi, F.: Hints to accelerate symbolic traversal. In: Proc. 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME). LNCS 1703. Berlin, Heidelberg, New York: Springer-Verlag, 1999
-
(1999)
Proc. 10th IFIP WG 10.5 Advanced Research Working Conference On Correct Hardware Design and Verification Methods (CHARME)
-
-
Ravi, K.1
Somenzi, F.2
-
42
-
-
0001510331
-
Formal verification by symbolic evaluation of partially-ordered trajectories
-
Seger, C.-J., Bryant, R.: Formal verification by symbolic evaluation of partially-ordered trajectories. Formal Methods Syst Design 6(2), 1995
-
Formal Methods Syst Design
, vol.6
, Issue.2
, pp. 1995
-
-
Seger, C.-J.1
Bryant, R.2
-
43
-
-
84948975180
-
A tutorial on St °almarck's proof procedure for propositional logic
-
LNCS 1522. Berlin, Heidelberg, New York: Springer- Verlag
-
Sheeran, M., Stålmarck, G.: A tutorial on St °almarck's proof procedure for propositional logic. In: 2nd International Conference on Formal Methods in Computer-Aided Design (FMCAD). LNCS 1522. Berlin, Heidelberg, New York: Springer- Verlag, 1998, pp. 82-99
-
(1998)
2nd International Conference On Formal Methods In Computer-Aided Design (FMCAD)
, pp. 82-99
-
-
Sheeran, M.1
Stålmarck, G.2
-
44
-
-
84944402340
-
Tuning SAT checkers for bounded model checking
-
LNCS 1855. Berlin, Heidelberg, New York: Springer-Verlag
-
Shtrichman, O.: Tuning SAT checkers for bounded model checking. In: Proc. 12th International Conference on Computer Aided Verification (CAV). LNCS 1855. Berlin, Heidelberg, New York: Springer-Verlag, 2000, pp. 480-494
-
(2000)
Proc. 12th International Conference On Computer Aided Verification (CAV)
, pp. 480-494
-
-
Shtrichman, O.1
|