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Volumn , Issue , 2000, Pages 724-729

Methodology for formal design of hardware control with application to cache coherence protocols

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BUFFER STORAGE; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SIMULATION; FORMAL LANGUAGES; JAVA PROGRAMMING LANGUAGE;

EID: 0033698178     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (9)

References (13)
  • Reference 정보가 존재하지 않습니다.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.