A Dual-Gate-Controlled Single-Electron Transistor Using Self-Aligned Polysilicon Sidewall Spacer Gates on Silicon-on-Insulator Nanowire

IEEE Transactions on Nanotechnology

Volumn 3, Issue 1 SPEC. ISS., 2004, Pages 93-97

  Hu, Shu Fen ^a   Wu, Yung Chun ^a,b   Sung, Chin Lung ^a   Chang, Chun Yen ^b   Huang, Tiao Yuan ^b  

^a NATIONAL NANO DEVICE LABORATORIES   (Taiwan)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

NanotechnoJogy; Quantum dots (QD); Quantum wires; Silicon on insulator (SOI) technology

Indexed keywords

CURRENT VOLTAGE CHARACTERISTICS; ELECTRON BEAM LITHOGRAPHY; MOSFET DEVICES; OSCILLATIONS; OXIDATION; POLYSILICON; SEMICONDUCTOR QUANTUM DOTS; SEMICONDUCTOR QUANTUM WIRES; SILICON ON INSULATOR TECHNOLOGY; THERMAL EFFECTS;

COULOMB BLOCKADE OSCILLATIONS; COULOMB GAP; COULOMB OSCILLATIONS; SHEET RESISTANCE;

NANOTECHNOLOGY;

EID: 2342648815     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2003.820784     Document Type: Conference Paper

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