Soft error rate estimation and mitigation for SRAM-based FPGAs

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 2005, Pages 149-160

  Asadi, Ghazanfar ^a   Tahoori, Mehdi B ^a  

^a Northeastern University   (United States)

Author keywords

Error Recovery; Soft Error Rate Estimation; SRAM Based FPGA

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; BIT ERROR RATE; COMPUTER AIDED SOFTWARE ENGINEERING; COMPUTER SIMULATION; LOGIC DESIGN; REDUNDANCY; STATIC RANDOM ACCESS STORAGE;

ERROR RECOVERY; SOFT ERROR RATE (SER) ESTIMATION; SRAM-BASED FPGA;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 20344399922     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1046192.1046212     Document Type: Conference Paper

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