Simulation-based analysis of SEU effects on SRAM-based FPGAs

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2438 LNCS, Issue , 2002, Pages 607-615

  Rebaudengo, M ^a   Sonza Reorda, M ^a   Violante, M ^a  

^a POLITECNICO DI TORINO   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CHARGED PARTICLES; COMPUTATION THEORY; COMPUTER CONTROL SYSTEMS; COSTS; RADIATION EFFECTS; RECONFIGURABLE ARCHITECTURES; SOFTWARE TESTING; STATIC RANDOM ACCESS STORAGE;

BENCHMARK CIRCUIT; CONFIGURATION MEMORY; FAULT INJECTION; LOW COSTS; RADIATION TESTING; SIMULATION-BASED ANALYSIS; SRAM-BASED FPGA;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 79955133275     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-46117-5_63     Document Type: Conference Paper

References (12)

1. th VLSI Test Symposium, April 1999, pp. 86-94
2. E. Fuller, M. Caffrey, A. Salazar, C. Carmichael, J. Fabula, "Radiation Characterization and SEU Mitigation of the Virtex FPGA for Space-Based Reconfigurable Computing", NSREC 2000
3. C. Carmichael, "Correcting Single Event Upsets Through Virtex Partial Reconfiguration", Xilinx application note 216, XAPP216, 2000
4. R. K. Iyer and D. Tang, "Experimental Analysis of Computer System Dependability", Chapter 5 of Fault-Tolerant Computer System Design, D. K. Pradhan (ed.), Prentice Hall, 1996
5. E. Jenn, J. Arlat, M. Rimen, J. Ohlsson, J. Karlsson, "Fault Injection into VHDL Models: the MEFISTO Tool", Proc. FTCS-24, 1994, pp. 66-75
6. G.A. Kanawati, N.A. Kanawati, J.A. Abraham, "FERRARI: A Flexible Software-Based Fault and Error Injection System", IEEE Trans. on Computers, Vol 44, N. 2, February 1995, pp. 248-260
7. J. Arlat, M. Aguera, L. Amat, Y. Crouzet, J.C. Fabre, J.-C. Laprie, E. Martins, D. Powell, "Fault Injection for Dependability Validation: A Methodology and some Applications", IEEE Transactions on Software Engineering, Vol. 16, No. 2, February 1990
8. "Virtex FPGA Series Configuration and Readback", Xilinx application note 138, XAPP138, 2001
9. http://www.xilinx.com/products/jbits/
10. F. Lima, C. Carmichael, J. Fabula, R. Padovani, R. Reis, "A Fault Injection Analysis of Virtex FPGA TMR Design Methodology", RADECS'2001
11. L. Antoni, R. Leveugle, B. Fehér, "Using Run-time Reconfiguration for Fault Injection in Hardware Prototypes", IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2000, pp. 405-413 (Pubitemid 32032724)
12. F. Corno, M. Sonza Reorda, G. Squillero, "RT-Level ITC 99 Benchmarks and First ATPG Results", IEEE Design & Test of Computers, July-August 2000, pp. 44-53