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Volumn 1, Issue 2, 2002, Pages 275-282

A fault injection analysis of virtex FPGA TMR design methodology

Author keywords

Fault injection; Field programmable gate arrays; Triple modular redundancy; Virtex

Indexed keywords

BIT ERROR RATE; FAULT TOLERANT COMPUTER SYSTEMS; MICROCONTROLLERS; PROTONS; RADIATION;

EID: 0036995793     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (90)

References (9)
  • 5
    • 0013321567 scopus 로고    scopus 로고
    • Radiation testing update, SEU mitigation, and availability analysis of the virtex FPGA for space re-configurable computing
    • Fuller, E., Caffrey, M., Salazar, A., Carmichael, C., Fabula, J., "Radiation Testing Update, SEU Mitigation, and Availability Analysis of the Virtex FPGA for Space Re-configurable Computing", NSREC, Jul. 2000.
    • NSREC, Jul. 2000
    • Fuller, E.1    Caffrey, M.2    Salazar, A.3    Carmichael, C.4    Fabula, J.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.