Combining retiming and recycling to optimize the performance of synchronous circuits

Proceedings - 16th Symposium on Integrated Circuits and Systems Design, SBCCI 2003

Volumn , Issue , 2003, Pages 47-52

  Carloni, L P ^a   Sangiovanni Vincentelli, A L ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Assembly systems; Buildings; Data processing; Delay; Integrated circuit interconnections; Pattern analysis; Performance analysis; Recycling; System level design; System on a chip

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; ARCHITECTURAL DESIGN; BUILDINGS; DATA HANDLING; DATA PROCESSING; DESIGN; ELECTRIC NETWORK ANALYSIS; INFORMATION MANAGEMENT; INTEGRATED CIRCUIT DESIGN; INTEGRATED CIRCUIT INTERCONNECTS; INTEGRATED CIRCUITS; LOGIC CIRCUITS; MICROPROCESSOR CHIPS; PROGRAMMABLE LOGIC CONTROLLERS; RECYCLING; SYSTEM-ON-CHIP; SYSTEMS ANALYSIS;

ASSEMBLY SYSTEMS; DELAY; INTEGRATED CIRCUIT INTERCONNECTIONS; PATTERN ANALYSIS; PERFORMANCE ANALYSIS; SYSTEM LEVEL DESIGN; SYSTEM ON A CHIP;

STRUCTURAL DESIGN;

EID: 18744404941     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SBCCI.2003.1232805     Document Type: Conference Paper

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