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Volumn , Issue , 2004, Pages 48-53

Thermal-aware clustered microarchitectures

Author keywords

[No Author keywords available]

Indexed keywords

HEAT GENERATION; MICROARCHITECTURES; PEAK TEMPERATURE; POWER DENSITY;

EID: 17644390309     PISSN: 10636404     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (36)

References (25)
  • 3
    • 0032592096 scopus 로고    scopus 로고
    • Design challenges of technology scaling
    • S. Borkar. "Design Challenges of Technology Scaling". IEEE Micro, 19(4), pp. 23-29, 1999.
    • (1999) IEEE Micro , vol.19 , Issue.4 , pp. 23-29
    • Borkar, S.1
  • 12
    • 1542269347 scopus 로고    scopus 로고
    • Reducing power density through activity migration
    • Low Power Electronics and Design, 2003. ISLPED '03. 25-27 Aug.
    • S. Heo, K. Barr, K. Asanović "Reducing power density through activity migration" Low Power Electronics and Design, 2003. ISLPED '03. Proc. of the 2003 Int. Symp. on, 25-27 Aug. 2003.
    • (2003) Proc. of the 2003 Int. Symp.
    • Heo, S.1    Barr, K.2    Asanović, K.3
  • 16
    • 0034230287 scopus 로고    scopus 로고
    • Dual-threshold voltage techniques for low-power digital circuits
    • J.T. Kao and A. P. Chandrakasan. "Dual-Threshold Voltage Techniques for Low-Power Digital Circuits". IEEE Journal of Solid State Circuits, 37(5), pp. 1009-1018, 2000.
    • (2000) IEEE Journal of Solid State Circuits , vol.37 , Issue.5 , pp. 1009-1018
    • Kao, J.T.1    Chandrakasan, A.P.2
  • 24
    • 0031635212 scopus 로고    scopus 로고
    • A technique for standby leakage reduction in high-performance circuits
    • Y. Ye, S. Borkar and V. De. "A Technique for Standby Leakage Reduction in High-Performance Circuits". Proc. of the Symp. on VLSI Circuits, pp. 40-41, 1998.
    • (1998) Proc. of the Symp. on VLSI Circuits , pp. 40-41
    • Ye, Y.1    Borkar, S.2    De, V.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.