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IEEE High-Performance Computer Architecture Symposium Proceedings

Volumn , Issue , 2000, Pages 133-142

Dynamic cluster assignment mechanisms

(3) Canal, Ramon a Parcerisa, Joan Manuel a González, Antonio a

a UNIVERSITAT POLITÈCNICA DE CATALUNYA (Spain)

Author keywords

Clustered microarchitectures; Dynamic code partitioning; Dynamically scheduled processors; Steering logic

Indexed keywords

DATA FLOW ANALYSIS; DATA HANDLING; DIGITAL ARITHMETIC; DYNAMIC PROGRAMMING; ENCODING (SYMBOLS); INTEGER PROGRAMMING; LOGIC PROGRAMMING; MULTIPROCESSING PROGRAMS; OPTIMIZATION; RESOURCE ALLOCATION;

CLUSTERED MICROARCHITECTURES; DYNAMIC CLUSTER ASSIGNMENT MECHANISMS; DYNAMIC CODE PARTITIONING; DYNAMICALLY SCHEDULED PROCESSORS; FLOATING POINT INSTRUCTIONS; INTEGER INSTRUCTIONS; STEERING LOGIC; WORKLOAD BALANCE;

TIME SHARING SYSTEMS;

EID: 0034581207 PISSN: None EISSN: None Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper

Times cited : (73)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.