-
1
-
-
0034798977
-
2 gate dielectric MOSFETs with TaN electrode and nitridation surface preparation"
-
2 gate dielectric MOSFETs with TaN electrode and nitridation surface preparation," VLSI Symp. Tech. Dig., pp. 15-16, 2001.
-
(2001)
VLSI Symp. Tech. Dig.
, pp. 15-16
-
-
Choi, R.1
Kang, C.S.2
Lee, B.H.3
Onishi, K.4
Nieh, R.5
Gopalan, S.6
Dharmarajan, E.7
Lee, J.C.8
-
2
-
-
0036575782
-
2 with top nitrogen incorporated layer"
-
May
-
2 with top nitrogen incorporated layer," IEEE Electron Device Lett. vol. 23, no. 5, pp. 249-251, May 2002.
-
(2002)
IEEE Electron Device Lett.
, vol.23
, Issue.5
, pp. 249-251
-
-
Cho, H.-J.1
Kang, C.S.2
Onishi, K.3
Gopalan, S.4
Nieh, R.5
Choi, R.6
Krishnan, S.7
Lee, J.C.8
-
3
-
-
12444320529
-
"Improvement in the uniformity and the thermal stability of Hf-silicate gate dielectric by plasma-nitridation"
-
S. Kamiyama, T. Aoyama, Y. Tsutsumi, H. Takada, A. Horiuchi, T. Maeda, K. Torii, H. Kitajima, and T. Arikado, "Improvement in the uniformity and the thermal stability of Hf-silicate gate dielectric by plasma-nitridation," in Proc. Int. Workshop Gate Insulator, 2003, pp. 42-46.
-
(2003)
Proc. Int. Workshop Gate Insulator
, pp. 42-46
-
-
Kamiyama, S.1
Aoyama, T.2
Tsutsumi, Y.3
Takada, H.4
Horiuchi, A.5
Maeda, T.6
Torii, K.7
Kitajima, H.8
Arikado, T.9
-
4
-
-
0036932242
-
"Thermally stable CVD HfOxNy advanced gate dielectrics with poly Si gate electrode"
-
C. H. Choi, S. J. Rhee, T. S. Jeon, N. Lu, J. H. Sim, R. Clark, M. Niwa, and D. L. Kwong, "Thermally stable CVD HfOxNy advanced gate dielectrics with poly Si gate electrode," IEDM Tech Dig., pp. 857-860, 2002.
-
(2002)
IEDM Tech Dig.
, pp. 857-860
-
-
Choi, C.H.1
Rhee, S.J.2
Jeon, T.S.3
Lu, N.4
Sim, J.H.5
Clark, R.6
Niwa, M.7
Kwong, D.L.8
-
5
-
-
0036045992
-
y"
-
y," in VLSI Symp. Tech. Dig., 2002, pp. 146-147.
-
(2002)
VLSI Symp. Tech. Dig.
, pp. 146-147
-
-
Kang, C.S.1
Cho, H.-J.2
Onishi, K.3
Choi, R.4
Nieh, R.5
Goplan, S.6
Krishnan, S.7
Lee, J.C.8
-
6
-
-
79956056584
-
"Application of HfSiON as a gate dielectric material"
-
M. R. Visokay, J. J. Chambers, A. L. P. Rotondaro, A. Shanware, and L. Colombo, "Application of HfSiON as a gate dielectric material," Appl. Phys. Lett., vol. 80, pp. 3183-3185, 2002.
-
(2002)
Appl. Phys. Lett.
, vol.80
, pp. 3183-3185
-
-
Visokay, M.R.1
Chambers, J.J.2
Rotondaro, A.L.P.3
Shanware, A.4
Colombo, L.5
-
7
-
-
0036928983
-
"Effects of nitrogen in HfSiON gate dielectric on the electrical and thermal characteristics"
-
M. Koyama, A. Kaneko, T. Ino, M. Koike, Y. Kamata, R. Iijima, Y. Kamimuta, A. Takashima, M. Suzuki, C. Hongo, S. Inumiya, M. Takayanagi, and A. Nishiyama, "Effects of nitrogen in HfSiON gate dielectric on the electrical and thermal characteristics," IEDM Tech. Dig., pp. 849-852, 2002.
-
(2002)
IEDM Tech. Dig.
, pp. 849-852
-
-
Koyama, M.1
Kaneko, A.2
Ino, T.3
Koike, M.4
Kamata, Y.5
Iijima, R.6
Kamimuta, Y.7
Takashima, A.8
Suzuki, M.9
Hongo, C.10
Inumiya, S.11
Takayanagi, M.12
Nishiyama, A.13
-
8
-
-
12444281165
-
"Effect of Hf-N bond on properties of thermally stable amorphous HfSiON and applicability of this material to sub-50 nm technology node LSIs"
-
M. Koike, T. Ino, Y. Kamimuta, M. Koyama, Y. Kamata, M. Suzuki, Y. Mitani, A. Nishiyama, and Y. Tsunashima, "Effect of Hf-N bond on properties of thermally stable amorphous HfSiON and applicability of this material to sub-50 nm technology node LSIs," IEDM Tech. Dig. pp. 4.7.1-4.7.4, 2002.
-
(2002)
IEDM Tech. Dig.
-
-
Koike, M.1
Ino, T.2
Kamimuta, Y.3
Koyama, M.4
Kamata, Y.5
Suzuki, M.6
Mitani, Y.7
Nishiyama, A.8
Tsunashima, Y.9
-
9
-
-
0842266671
-
"High-Κ dielectrics and MOSFET characteristics"
-
J. C. Lee, H. J. Cho, C. S. Kang, S. Rhee, Y. H. Kim, R. Choi, C. Y. Kang, C. Choi, and M. Akbar, "High-Κ dielectrics and MOSFET characteristics," IEDM Tech. Dig., pp. 4.4.1-4.4.4, 2003.
-
(2003)
IEDM Tech. Dig.
-
-
Lee, J.C.1
Cho, H.J.2
Kang, C.S.3
Rhee, S.4
Kim, Y.H.5
Choi, R.6
Kang, C.Y.7
Choi, C.8
Akbar, M.9
-
10
-
-
4544357684
-
"The effects of nitrogen and silicon profile on high-kΚ MOSFET performance and bias temperature instability"
-
C. Choi, C. S. Kang, C. Y. Kang, R. Choi, H.-J. Cho, Y. H. Kim, S. J. Rhee, M. Akbar, and J. C. Lee, "The effects of nitrogen and silicon profile on high-kΚ MOSFET performance and bias temperature instability," VLSI Symp. Tech. Dig., pp. 214-215, 2004.
-
(2004)
VLSI Symp. Tech. Dig.
, pp. 214-215
-
-
Choi, C.1
Kang, C.S.2
Kang, C.Y.3
Choi, R.4
Cho, H.-J.5
Kim, Y.H.6
Rhee, S.J.7
Akbar, M.8
Lee, J.C.9
-
11
-
-
0033725308
-
"NBTI enhancement by nitrogen incorporation into ultrathin gate oxide for 0.10-m gate CMOS generation"
-
N. Kimizuka, K. Yamaguchi, K. Imai, T. Iizuka, C. T. Liu, R. C. Keller, and T. Horiuchi, "NBTI enhancement by nitrogen incorporation into ultrathin gate oxide for 0.10-m gate CMOS generation," VLSI Symp. Tech. Dig., pp. 92-93, 2000.
-
(2000)
VLSI Symp. Tech. Dig.
, pp. 92-93
-
-
Kimizuka, N.1
Yamaguchi, K.2
Imai, K.3
Iizuka, T.4
Liu, C.T.5
Keller, R.C.6
Horiuchi, T.7
-
12
-
-
84955259235
-
"Negative bias temperature instability of pMOSFETs with ultra-thin SiON gate dielectrics"
-
S. Tsujikawa, T. Mine, K. Watanabe, Y. Shimamoto, R. Tsuchiya, K. Ohnishi, T. Onai, J. Yugami, and S. Kimura, "Negative bias temperature instability of pMOSFETs with ultra-thin SiON gate dielectrics," in Proc. IEEE Int. Reliability Physics Symp., 2003, pp. 183-188.
-
(2003)
Proc. IEEE Int. Reliability Physics Symp.
, pp. 183-188
-
-
Tsujikawa, S.1
Mine, T.2
Watanabe, K.3
Shimamoto, Y.4
Tsuchiya, R.5
Ohnishi, K.6
Onai, T.7
Yugami, J.8
Kimura, S.9
-
13
-
-
0037634587
-
"Evaluation of the positive biased temperature stress stability in HfSiON gate dielectrics"
-
A. Shanware, M. R. Visokay, J. J. Chambers, A. L. P. Rotondaro, H. Bu, M. J. Bevan, R. Khamankar, S. Aur, P. E. Nicollian, J. McPherson, and L. Colombo, "Evaluation of the positive biased temperature stress stability in HfSiON gate dielectrics," in Proc. IEEE Int. Reliability Physics Symp., 2003.
-
(2003)
Proc. IEEE Int. Reliability Physics Symp.
-
-
Shanware, A.1
Visokay, M.R.2
Chambers, J.J.3
Rotondaro, A.L.P.4
Bu, H.5
Bevan, M.J.6
Khamankar, R.7
Aur, S.8
Nicollian, P.E.9
McPherson, J.10
Colombo, L.11
-
14
-
-
4544250302
-
"SiN-capped HfSiON gate stacks with improved bias temperature instabilites for 65 nm-node low-standby-power transistors"
-
Y. Tamura, T. Sasaki, N. Izumi, F. Ootsuka, M. Yasuhira, T. Hoshi, S. Kune, H. Amai, T. Ida, T. Aoyama, S. Kamiyama, K. Torii, H. Kitajima, and T. Arikado, "SiN-capped HfSiON gate stacks with improved bias temperature instabilites for 65 nm-node low-standby-power transistors," VLSI Symp. Tech. Dig., pp. 210-211, 2004.
-
(2004)
VLSI Symp. Tech. Dig.
, pp. 210-211
-
-
Tamura, Y.1
Sasaki, T.2
Izumi, N.3
Ootsuka, F.4
Yasuhira, M.5
Hoshi, T.6
Kune, S.7
Amai, H.8
Ida, T.9
Aoyama, T.10
Kamiyama, S.11
Torii, K.12
Kitajima, H.13
Arikado, T.14
-
15
-
-
0043201362
-
2 MOSFETs"
-
Jun
-
2 MOSFETs," IEEE Trans. Electron Devices, vol. 50, no. 6, pp. 1517-1524, Jun. 2003.
-
(2003)
IEEE Trans. Electron Devices
, vol.50
, Issue.6
, pp. 1517-1524
-
-
Onishi, K.1
Choi, R.2
Kang, C.S.3
Cho, H.-J.4
Kim, Y.H.5
Nieh, R.6
Han, J.7
Krishnan, S.8
Akbar, M.9
Lee, J.C.10
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