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Volumn , Issue , 2003, Pages 343-350

Foundry technology for 130nm and beyond SoC

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIGITAL CIRCUITS; ELECTRIC FIELDS; ELECTRIC POWER SUPPLIES TO APPARATUS; LEAKAGE CURRENTS; LITHOGRAPHY; MOSFET DEVICES; SUBSTRATES;

EID: 0242527272     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (4)

References (19)
  • 1
    • 25744438068 scopus 로고    scopus 로고
    • An enhanced 130 nm generation logic technology featuring 60 nm transistors optimized for high performance and low power at 0.7-1.4V
    • paper 11.6
    • S. Thompson, et al., "An Enhanced 130 nm Generation Logic Technology Featuring 60 nm Transistors Optimized for High Performance and Low Power at 0.7-1.4V," Digest of IEDM 2001, paper 11.6
    • Digest of IEDM 2001
    • Thompson, S.1
  • 2
    • 0033325117 scopus 로고    scopus 로고
    • Device issues in the integration of analog/RF functions in deep sub-micron digital CMOS
    • Dennis Buss, "Device Issues in the Integration of Analog/RF Functions in Deep Sub-micron Digital CMOS," Digest of IEDM 1999, p.423
    • Digest of IEDM 1999 , pp. 423
    • Buss, D.1
  • 3
    • 0242593439 scopus 로고    scopus 로고
    • State of the art RF/analog foundry technology
    • paper 22.1
    • Jason C.H. Lin, et al., "State of the Art RF/Analog Foundry Technology," Digest of BCTM 2002, paper 22.1
    • Digest of BCTM 2002
    • Lin, J.C.H.1
  • 5
    • 85070027832 scopus 로고    scopus 로고
    • 2 gate dielectric and polysilicon damascene gate
    • paper 17.1
    • 2 Gate Dielectric and Polysilicon Damascene Gate," Dig. Of IEDM 2002, paper 17.1
    • Dig. of IEDM 2002
    • Tavel, B.1
  • 7
    • 22544477781 scopus 로고    scopus 로고
    • A 9uW 50MHz 32b adder using a self-adjusted forward body bias in SoCs
    • paper6.8
    • K. Ishibashi, "A 9uW 50MHz 32b Adder using a self-adjusted forward body bias in SoCs," Dig. Of ISSCC 2003, paper6.8, p. 116
    • Dig. of ISSCC 2003 , pp. 116
    • Ishibashi, K.1
  • 8
    • 0036927963 scopus 로고    scopus 로고
    • SiGe HBTs with cut-off frequency of 350GHz
    • paper 31.3
    • J.-S. Rich, et al., "SiGe HBTs with Cut-off Frequency of 350GHz," Digest of IEDM2002, paper 31.3
    • Digest of IEDM2002
    • Rich, J.-S.1
  • 9
    • 0036923796 scopus 로고    scopus 로고
    • Ultra-high-speed scaled-down self-aligned SEG SiGe HBTs
    • paper 31.2
    • K. Washio, et al., "Ultra-High-Speed Scaled-down Self-Aligned SEG SiGe HBTs," Digest of IEDM 2002, paper 31.2
    • Digest of IEDM 2002
    • Washio, K.1
  • 10
    • 0036930469 scopus 로고    scopus 로고
    • Sub 5 ps SiGe bipolar technology
    • paper 31.1
    • J. Bock, et al., "Sub 5 ps SiGe Bipolar Technology," Digest of IEDM 2002, paper 31.1
    • Digest of IEDM 2002
    • Bock, J.1
  • 11
    • 0036927966 scopus 로고    scopus 로고
    • A flexible, low-cost, high performance SiGe:C BiCMOS process with a one-mask HBT module
    • paper 31.5
    • D. Knoll, et al., "A Flexible, Low-Cost, High Performance SiGe:C BiCMOS Process with a One-Mask HBT Module," Digest of IEDM 2002, paper 31.5
    • Digest of IEDM 2002
    • Knoll, D.1
  • 13
    • 18344405850 scopus 로고    scopus 로고
    • 0.1 μm RFCMOS on high resistivity substrates for system on chip (SoC) applications
    • paper 27.8
    • J.-Y. Yang et al., "0.1 μm RFCMOS on high Resistivity Substrates for System on Chip (SoC) Applications," Digest of IEDM 2002, paper 27.8
    • Digest of IEDM 2002
    • Yang, J.-Y.1
  • 14
    • 0242593447 scopus 로고    scopus 로고
    • Private communications, Dr. C.T. Yang
    • Private communications, Dr. C.T. Yang.
  • 15
    • 0036049043 scopus 로고    scopus 로고
    • A porous Si based novel isolation technology for mixed-signal integrated circuits
    • paper 16.3
    • H.-S. Kim, et al., "A Porous Si Based Novel Isolation Technology for Mixed-signal Integrated Circuits," Dig. Symp. Of VISI Technology 2002, p.160, paper 16.3
    • Dig. Symp. of VISI Technology 2002 , pp. 160
    • Kim, H.-S.1
  • 16
    • 0036045163 scopus 로고    scopus 로고
    • Improvement of high resistivity substrate for future mixed analog-digital applications
    • paper 16.2
    • T. Ohguro, et al., "Improvement of High Resistivity Substrate for Future Mixed Analog-Digital Applications," Dig. Symp. Of VLSI Technology 2002 p.158, paper 16.2
    • Dig. Symp. of VLSI Technology 2002 , pp. 158
    • Ohguro, T.1
  • 18
    • 0242593448 scopus 로고    scopus 로고
    • Characterization and model of high quality factor and broadband integrated inductor on Si-substrate
    • submitted for publication
    • M. T. Yang, et al., "Characterization and Model of High Quality Factor and Broadband Integrated Inductor on Si-Substrate," submitted for publication
    • Yang, M.T.1
  • 19
    • 0036923873 scopus 로고    scopus 로고
    • High capacitance Cu/Ta2O5/Cu MiM structure for SoC applications featuring a single mask add-on process
    • paper 9.7
    • T. Ishikawa, D. Kodama, Y. Matsui, "High Capacitance Cu/Ta2O5/Cu MiM Structure for SoC Applications Featuring a single Mask add-on Process," Digest of IEDM 2002, paper 9.7
    • Digest of IEDM 2002
    • Ishikawa, T.1    Kodama, D.2    Matsui, Y.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.