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Volumn 2858, Issue , 2003, Pages 10-25

Kilo-instruction processors

Author keywords

[No Author keywords available]

Indexed keywords

ARTIFICIAL INTELLIGENCE; COMPUTERS;

EID: 0242370931     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-39707-6_2     Document Type: Article
Times cited : (12)

References (33)
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  • 6
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    • (2002) Large Virtual Robs by Processor Checkpointing
    • Cristal, A.1    Valero, M.2    Gonzalez, A.3    Llosa, J.4
  • 9
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    • Energy-effective issue logic
    • Proceedings of the 28th Annual International Symposium on Computer Architecture, Göteborg, Sweden, June 30-July 4, 2001. IEEE Computer Society and ACM SIGARCH. May
    • D. Folegnani and A. González. Energy-effective issue logic. In Proceedings of the 28th Annual International Symposium on Computer Architecture, pages 230-239, Göteborg, Sweden, June 30-July 4, 2001. IEEE Computer Society and ACM SIGARCH. Computer Architecture News, 29(2), May 2001.
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  • 20
    • 35248829380 scopus 로고    scopus 로고
    • Technical Report UPC-DAC-2001-37, Universidad Politécnica de Cataluña, Department of Computer Architecture, November
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    • (2001) Recovery Mechanism for Latency Misprediction
    • Morancho, E.1    Llabería, J.M.2    Olivé, A.3
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    • IEEE Computer Society Press
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    • (2002) Proceedings of the 35th Annual ACM/IEEE International Symposium on Microarchitecture , pp. 383-394
    • Seznec, A.1    Toullec, E.2    Rochecouste, O.3
  • 27
    • 0034273716 scopus 로고    scopus 로고
    • The design space of register renaming techniques
    • IEEE Computer Society, September
    • D. Sima. The design space of register renaming techniques. In Micro, IEEE , Volume: 20 Issue: 5, pages 70-83. IEEE Computer Society, September 1999.
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  • 28
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.