Memory-system design considerations for dynamically-scheduled processors

Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA

Volumn , Issue , 1997, Pages 133-143

  Farkas, Keith I ^a   Chow, Paul ^a   Jouppi, Norman P ^a   Vranesic, Zvonko ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; BUFFER STORAGE; HIERARCHICAL SYSTEMS; STORAGE ALLOCATION (COMPUTER); SYSTEMS ANALYSIS; TELECOMMUNICATION TRAFFIC;

DYNAMICALLY SCHEDULED PROCESSORS; INCREMENTAL PREFETCHING TECHNIQUES; STREAM BUFFERS;

PROGRAM PROCESSORS;

EID: 0030679080     PISSN: 08847495     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/264107.264156     Document Type: Conference Paper

References (15)