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Volumn 24, Issue 5, 2003, Pages 360-362

Reduction of carrier depletion in p+ polysilicon gates using laser thermal processing

Author keywords

Boron penetration; Laser thermal processing; Poly depletion

Indexed keywords

ACTIVATION ENERGY; CARRIER CONCENTRATION; CHARGE CARRIERS; CRYSTALLIZATION; DEGRADATION; INTERFACES (MATERIALS); MOS DEVICES; RAPID THERMAL ANNEALING; SECONDARY ION MASS SPECTROMETRY; SEMICONDUCTOR DEVICE STRUCTURES;

EID: 0042173080     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2003.812578     Document Type: Article
Times cited : (9)

References (13)
  • 2
    • 0032256253 scopus 로고    scopus 로고
    • 25 nm CMOS design considerations
    • Y. Taur, C. H. Wann, and D. J. Frank, "25 nm CMOS design considerations," in IEDM Tech. Dig., 1998, pp. 789-792.
    • (1998) IEDM Tech. Dig. , pp. 789-792
    • Taur, Y.1    Wann, C.H.2    Frank, D.J.3
  • 5
    • 84886448106 scopus 로고    scopus 로고
    • Effects of gate depletion and boron penetration on matching of deep submicron CMOS transistors
    • H. P. Tuinhout, A. H. Montree, J. Schmitz, and P. A. Stolk, "Effects of gate depletion and boron penetration on matching of deep submicron CMOS transistors," in IEDM Tech. Dig., 1997, pp. 631-634.
    • (1997) IEDM Tech. Dig. , pp. 631-634
    • Tuinhout, H.P.1    Montree, A.H.2    Schmitz, J.3    Stolk, P.A.4
  • 10
    • 0032139019 scopus 로고    scopus 로고
    • Boron diffusion and penetration in ultrathin oxide with poly-Si gate
    • Aug.
    • M. Cao, P. V. Voorde, M. Cox, and W. Greene, "Boron diffusion and penetration in ultrathin oxide with poly-Si gate," IEEE Electron Device Lett., vol. 19, pp. 291-293, Aug. 1998.
    • (1998) IEEE Electron Device Lett. , vol.19 , pp. 291-293
    • Cao, M.1    Voorde, P.V.2    Cox, M.3    Greene, W.4
  • 12
    • 0042895355 scopus 로고    scopus 로고
    • [Online]
    • [Online]. Available: http://www.device.eecs.berkeley.edu/qmcv.html
  • 13
    • 0030289752 scopus 로고    scopus 로고
    • Gate capacitance attenuation in MOS devices with thin gate dielectrics
    • Nov.
    • K. S. Krisch, J. D. Bude, and L. Manchanda, "Gate capacitance attenuation in MOS devices with thin gate dielectrics," IEEE Electron Device Lett., vol. 17, pp. 521-524, Nov. 1996.
    • (1996) IEEE Electron Device Lett. , vol.17 , pp. 521-524
    • Krisch, K.S.1    Bude, J.D.2    Manchanda, L.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.