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Volumn , Issue , 2003, Pages 390-395

Non-iterative switching window computation for delay-noise

Author keywords

Cross talk noise; Superposition; Switching Window

Indexed keywords

ALGORITHMS; COMPUTATION THEORY; CROSSTALK; DELAY CIRCUITS; MATHEMATICAL MODELS; PROBLEM SOLVING; SPURIOUS SIGNAL NOISE;

EID: 0041633844     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/775930.775934     Document Type: Conference Paper
Times cited : (9)

References (11)
  • 3
    • 0042194872 scopus 로고    scopus 로고
    • On Switching factor based analysis of coupled RC interconnects
    • June
    • A. B. Kahng, S. Muddu, E. Sarto, "On Switching Factor Based Analysis of Coupled RC Interconnects," DAC, pp 266-269, June 2000.
    • (2000) DAC , pp. 266-269
    • Kahng, A.B.1    Muddu, S.2    Sarto, E.3
  • 5
    • 0033716473 scopus 로고    scopus 로고
    • A timing model incorporating the effect of crosstalk on delay and its application to optimal channel routing
    • S. Sapatnekar, "A timing model incorporating the effect of crosstalk on delay and its application to optimal channel routing," IEEE Trans. on CAD, Vol 19, No. 5, pp. 550 - 559, 2000.
    • (2000) IEEE Trans. on CAD , vol.19 , Issue.5 , pp. 550-559
    • Sapatnekar, S.1
  • 6
    • 84949777577 scopus 로고    scopus 로고
    • Switching window computation for static timing analysis in the presence of crosstalk noise
    • P. Chen, D. A. Kirkpatrick, K. Keutzer, "Switching Window Computation for Static Timing Analysis in the Presence of Crosstalk Noise," ICCAD, pp. 331-337, 2000.
    • (2000) ICCAD , pp. 331-337
    • Chen, P.1    Kirkpatrick, D.A.2    Keutzer, K.3
  • 7
    • 0034854003 scopus 로고    scopus 로고
    • Timing analysis with crosstalk as fixed points on complete lattice
    • H. Zhou, N. Shenoy, W. Nicholls, "Timing Analysis with crosstalk as fixed points on Complete Lattice", Proc. ACM/IEEE DAC 2001.
    • (2001) Proc. ACM/IEEE DAC 2001
    • Zhou, H.1    Shenoy, N.2    Nicholls, W.3
  • 8
    • 0030686019 scopus 로고    scopus 로고
    • Calculating worst-case gate delays due to dominant capacitance coupling
    • F. Dartu, L. T. Pileggi, "Calculating Worst-Case Gate Delays Due to Dominant Capacitance Coupling," Proc. ACM/IEEE DAC, 1997
    • (1997) Proc. ACM/IEEE DAC
    • Dartu, F.1    Pileggi, L.T.2
  • 9
    • 0141426701 scopus 로고    scopus 로고
    • Efficient switching window computation for cross-talk noise
    • B. Thudi, D. Blaauw, "Efficient Switching Window Computation for Cross-Talk Noise," Proc. ACM/IEEE TAU 2002
    • (2002) Proc. ACM/IEEE TAU 2002
    • Thudi, B.1    Blaauw, D.2
  • 10
    • 0032319737 scopus 로고    scopus 로고
    • Determination of worst-case aggressor alignment for delay calculation
    • November
    • P.D. Gross, R. Arunachalam, K. Rajagopal, L.T. Pileggi, "Determination of worst-case aggressor alignment for delay calculation," Proc. IEEE/ACM ICCAD, pp. 212-219, November 1998.
    • (1998) Proc. IEEE/ACM ICCAD , pp. 212-219
    • Gross, P.D.1    Arunachalam, R.2    Rajagopal, K.3    Pileggi, L.T.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.