DC SPICE model for nanocrystalline and microcrystalline silicon TFTs

IEEE Transactions on Electron Devices

Volumn 49, Issue 11, 2002, Pages 1979-1984

  Dosev, D ^a   Ytterdal, T ^b   Pallares, J ^a   Marsal, L F ^a   Iniguez B ^a  

^a UNIVERSITAT ROVIRA I VIRGILI   (Spain)

^b NORWEGIAN UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Norway)

Author keywords

Microcrystalline; Modeling; Nanocrystalline; Thin film transistors

Indexed keywords

AMORPHOUS SILICON; COMPUTER SIMULATION; NANOSTRUCTURED MATERIALS; SEMICONDUCTOR DEVICE MODELS; TRANSCONDUCTANCE;

MICROCRYSTALLINE SILICON;

THIN FILM TRANSISTORS;

EID: 0036866959     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2002.804719     Document Type: Article

References (23)

1. L.C. Wei and C.C. Yen, "A novel thin-film transistor with vertical offset structure," Jpn. J. Appl. Phys., vol. 36, pp. 2032-2043, 1997.
2. P.R. Cabarrocas, R. Brenot, P. Bulkin, R. Vanderhaghen, B.A. Drevillon, and I. French, "Stable microcrystalline silicon thin-film transistors produced by the layer-by-layer technique," J. Appl. Phys., vol. 86, pp. 7079-7082, 1999.
3. E. Demaray, C. Deshpandry, and R. Pethe, "Microcrystalline silicon thin films by PVD for wide-area low-temperature polysilicon production," in Proc. SID, San Jose, CA, 1999.
4. M.W.D. Froggatt, W.I. Milne, and M.J. Powell, "Near-intrinsic microcrystalline silicon for use in thin film transistors," in Proc. Amorphous and Microcrystalline Silicon Technology Symp., San Francisco, CA, 1997.
5. S.S. He and G. Lucovsky, "A low temperature plasma-assisted deposition process for microcrystalline thin film transistors, TFTs," in Proc. Flat Panel Display Materials Symp., Pittsburgh, PA, 1994.
6. J. Puigdollers, D. Dosev, A. Orpella, C. Voz, D. Peiro, J. Bertomeu, L.F. Marsal, J. Pallares, J. Andreu, and R. Alcubilla, "Microcrystalline silicon thin film transistors obtained by hot-wire CVD," Mater Sci. Eng. B, vol. 70, pp. 526-529, 2000.
7. J. Puigdollers, A. Orpella, D. Dosev, C. Voz, D. Peiro, J. Pallares, L.F. Marsal, J. Bertomeu, J. Andreu, and R. Alcubilla, "Thin film transistors obtained by hot wire CVD," J. Noncryst. Solids, vol. 266, pp. 1304-1309, 2000.
8. K.C. Wang, B.Y. Chen, K.C. Hsu, T.R. Yew, and H.L. Hwang, "Thin film transistors made from hydrogenated microcrystalline silicon," in Proc. Crystallization and Related Phenomena in Amorphous Materials Symp., Pittsburgh, PA, 1994.
9. R.B. Wehrspohn, M.J. Powell, S.C. Dearie, I.D. French, and P. Roca i Cabarrocas, "Dangling-bond defect state creation in microcrystalline silicon thin-film transistors," Appl. Phys. Lett., vol. 77, pp. 750-752, 2000.
10. D.K. Dosev, J. Puigdollers, A. Orpella, C. Voz, M. Fonrodona, D. Soler, L.F. Marsal, J. Pallarès, J. Bertomeu, J. Andreu, and R. Alcubilla, "Analysis of bias stress on thin-film transistors obtained by hot-wire chemical vapor deposition," Thin-Solid Films, vol. 383, pp. 307-309, 2001.
11. M.S. Shut, M.D. Jacunski, H.C. Slade, A.A. Owusu, T. Ytterdal, and M. Hack, "SPICE models for amorphous silicon and polysilicon thin film transistors," in Proc. 3rd Symp. Thin Film Transistor Technologies, Pennington, NJ, 1997.
12. M.D. Jacunski, M.S. Shur, and M. Hack, "Threshold voltage, field-effect mobility, and gate-to-channel capacitance in polysilicon TFTs," IEEE Trans. Electron Devices, vol. 43, pp. 1433-1440, Jan. 1996.
13. R.E.I. Schropp, K.F. Feenstra, C.H.M. Van Der Werf, J. Holleman, and H. Meiling, "Hot-wire deposited amorphous silicon thin-film transistors," in Flat Panel Display Materials II. Symp., Pittsburgh, PA, 1997.
14. R.E.I. Schropp, K.F. Feenstra, C.H.M. van der Werf, J. Holleman, and H. Meiling, "Hot-wire deposited amorphous silicon thin-film transistors," in Proc. Amorphous Silicon Technology Symp., San Francisco, CA, 1996.
15. J.K. Rath, H. Meiling, and R.E.I. Schropp, "Low-temperature deposition of polycrystalline silicon thin films by hot-wire CVD," Sol. Energy Mat. Sol. Cells, vol. 48, pp. 1-4, 1997.
16. K.F. Feenstra, R.E.I. Schropp, and W.F. van der Weg, "Deposition of amorphous silicon films by hot-wire chemical vapor deposition," J. Appl. Phys., vol. 85, pp. 6843-6852, 1999.
17. J. Puigdollers, J. Bertomeu, J. Cifre, J. Andreu, and J.C. Delgado, "Deposition of polysilicon films by hot-wire CVD at low temperatures for photovoltaic applications," in Proc. Amorphous Silicon Technology Symp., San Francisco, CA, 1995.
18. M.S. Shur, H.C. Slade, M.D. Jacunski, A.A. Owusu, and T. Ytterdal, "SPICE models for amorphous silicon and polysilicon thin film transistors," J. Electrochem. Soc., vol. 144, pp. 2833-2839, 1997.
19. M. Shur, Physics of Semiconductor Devices. Englewood Cliffs, NJ: Prentice-Hall, 1990.
20. K. Lee, M. Shur, T.A. Fjeldly, and T. Ytterdal, Semiconductor Device Modeling for VLSI, 1st ed. Englewood Cliffs, NJ: Prentice-Hall, 1993.
21. C.S. Shien and J.B. Kuo, "An analytical a-Si:H TFT DC/capacitance model using an effective temperature approach for deriving a switching time model for an inverter circuit considering deep and tail states," IEEE Trans. Electron Devices, vol. 41, pp. 1169-1178, Jan. 1994.
22. M.S. Shur, H.C. Slade, T. Ytterdal, L. Wang, Z. Xu, M. Hack, K. Aflatooni, Y. Byun, Y. Chen, M. Froggatt, A. Krishnan, P. Mei, H. Meiling, B.H. Min, A. Nathan, S. Sherman, M. Stewart, and S. Theiss, "Modeling and scaling of a-Si:H and poly-Si thin film transistors," in Proc. Amorphous and Microcrystalline Silicon Technology Symp., San Francisco, CA, 1997.
23. D. Dosev, "Fabrication, characterization and modeling of microcrystalline silicon thin film transistors obtained by hot-wire chemical vapor deposition at low temperature," Ph.D. thesis, Univ. Politèc. Catalunya (UPC), Barcelona, Spain, 2002.