A traveling-wave-based waveform approximation technique for the timing verification of single transmission lines

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 21, Issue 6, 2002, Pages 723-730

  Eo, Yungseon ^a   Shim, Jongin ^a   Eisenstadt, William R ^b  

^a Hanyang University   (South Korea)

^b University of Florida   (United States)

Author keywords

Signal delay; Signal integrity; System pole; Transmission line; Traveling wave; VLSI interconnect

Indexed keywords

ELECTRIC DELAY LINES; TIME DOMAIN ANALYSIS; VLSI CIRCUITS; WAVEFORM ANALYSIS;

VLSI INTERCONNECTS;

ELECTRIC LINES;

EID: 0036609341     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2002.1004316     Document Type: Article

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