Sequential circuit test generation using a symbolic/genetic hybrid approach

Journal of Electronic Testing: Theory and Applications (JETTA)

Volumn 17, Issue 3-4, 2001, Pages 321-330

  Fummi, Franco ^a   Boschini, Marco ^b   Yu, Xiaoming ^c   Rudnick, Elizabeth M ^c  

^a UNIVERSITY OF VERONA   (Italy)

^b STMICROELECTRONICS   (Italy)

^c UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

Automatic test generation; Binary decision diagrams; Finite state machine with datapath; Genetic algorithms

Indexed keywords

ALGORITHMS; FAULT TOLERANT COMPUTER SYSTEMS; GENETIC ALGORITHMS; SEQUENTIAL CIRCUITS;

AUTOMATIC TEST GENERATION; BINARY DECISION DIAGRAMS; FINITE STATE MACHINE WITH DATAPATH; SEQUENTIAL CIRCUIT TEST GENERATION;

ELECTRONIC EQUIPMENT TESTING;

EID: 0035373287     PISSN: 09238174     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1012275631257     Document Type: Conference Paper

References (21)

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