Circuit/device modeling at the quantum level

IEEE Transactions on Electron Devices

Volumn 47, Issue 10, 2000, Pages 1819-1825

  Yu, Zhiping ^a,b   Dutton, Robert W ^a   Kiehl, Richard A ^a  

^a Stanford University   (United States)

^b University of Minnesota   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; INTEGRATED CIRCUIT LAYOUT; MOS DEVICES; QUANTUM THEORY; SEMICONDUCTING SILICON; SEMICONDUCTOR JUNCTIONS; TRANSISTOR TRANSISTOR LOGIC CIRCUITS;

QUANTUM LEVEL; QUANTUM MECHANICAL EFFECTS; SILICON DEVICES; SINGLE ELECTRON JUNCTIONS;

SEMICONDUCTOR DEVICE MODELS;

EID: 0034295896     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.870554     Document Type: Article

References (22)

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