Tree-structured LFSR synthesis scheme for pseudo-exhaustive testing of VLSI circuits

IEE Proceedings: Computers and Digital Techniques

Volumn 147, Issue 5, 2000, Pages 343-348

  Rau, J C ^a   Jone, W B ^b   Chang, S C ^b   Wu, Y L ^b  

^a NATIONAL CHUNG CHENG UNIVERSITY   (Taiwan)

^b CHINESE UNIVERSITY OF HONG KONG   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURAL DESIGN; COMBINATORIAL CIRCUITS; SEQUENTIAL CIRCUITS; SIGNAL SYSTEMS; TEST FACILITIES;

PSEUDO EXHAUSTIVE TEST PATTERNS; SCAN TREES; SIGNAL REUSE; SIGNAL SHARING;

VLSI CIRCUITS;

EID: 0034268697     PISSN: 13502387     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-cdt:20000544     Document Type: Article

References (12)

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