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Volumn 19, Issue 8, 2000, Pages 825-839

Efficient handling of operating range and manufacturing line variations in analog cell synthesis

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; AMPLIFIERS (ELECTRONIC); ANALOG STORAGE; CMOS INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; ELECTRIC NETWORK TOPOLOGY; ELECTRIC POWER SUPPLIES TO APPARATUS; MONTE CARLO METHODS; MOS DEVICES;

EID: 0034248778     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.856971     Document Type: Article
Times cited : (33)

References (39)
  • 2
    • 33749926053 scopus 로고    scopus 로고
    • 1C scenarios for the 90's," in VLSI Symp., 1995.
    • P.R. Gray, "Possible analog 1C scenarios for the 90's," in VLSI Symp., 1995.
    • "Possible Analog
    • Gray, P.R.1
  • 25
    • 0022597953 scopus 로고    scopus 로고
    • 1C yield optimization based on fundamental fabrication parameters," IEEE Trans. Computer-Aided Design, vol. 5, Jan. 1996.
    • M.A. Styblinski and L. J. Opalski, "Algorithms and software tools of 1C yield optimization based on fundamental fabrication parameters," IEEE Trans. Computer-Aided Design, vol. 5, Jan. 1996.
    • And L. J. Opalski, "Algorithms and Software Tools of
    • Styblinski, M.A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.