Universal HSPICE macromodel for giant magnetoresistance memory bits

IEEE Transactions on Magnetics

Volumn 36, Issue 4 PART 2, 2000, Pages 2062-2072

  Das, Bodhisattva ^a   Black Jr , William C ^a   Pohm, Arthur V ^a  

^a Iowa State University of Science and Technology   (United States)

Author keywords

Giant magnetoresistance; GMR; HSPICE; Memory; Model; MRAM; Pseudo spin value; Spin value

Indexed keywords

COMPUTER SIMULATION; ELECTRIC CURRENTS; MAGNETIC HYSTERESIS; MAGNETORESISTANCE; MATHEMATICAL MODELS; NONVOLATILE STORAGE; SEMICONDUCTOR STORAGE;

GIANT MAGNETORESISTANCE (GMR) MEMORY BITS; SOFTWARE PACKAGE HSPICE;

MAGNETIC STORAGE;

EID: 0034220777     PISSN: 00189464     EISSN: None     Source Type: Journal    
DOI: 10.1109/20.875339     Document Type: Article

References (37)

1. M. N. Baibich, J. M. Broto, A. Fert, F. Nguyen Van Dau, F. Pettroff, P. Etienne, G. Creuzer, A. Friederich, and J. Chazelas, "Giantmagneto-resistance of (001)Fe/(001)Cr magnetic super-lattice," Phys. Rev. Lett., vol. 61, p. 2472, 1988.
2. J. Daughton, J. Brown, E. Chen, A. Pohm, and A. Kude, "Magnetic field sensors using GMR multilayers," IEEE Trans. Magn., vol. 30, pp. 4608-4610, Nov. 1994.
3. E. Grochowski and D. A. Thomson, "Outlook for maintaining areal density growth in magnetic recording," IEEE Trans. Magn., vol. 30, no. 6, pp. 3797-3800, 1994.
4. A. V. Pohm, J. M. Daughton, J. Brown, and R. Beech, "The architecture of a high performance mass store with GMR memory cells," IEEE Trans. Magn., vol. 31, p. 3200, Nov. 1995.
5. M. M. Hassoun, W. C. Black, E. K. F. Lee, R. L. Geiger, and A. Hurst, "Field programmable logic gates using GMR devices," IEEE Trans. Magn., vol. 33, pp. 3307-3309, Sept. 1997.
6. J. Shen, "Logic devices and circuits based on giant magnetoresistance," IEEE Trans. Magn., vol. 33, pp. 4492-4497, Nov. 1997.
7. I. W. Ranmuthu, K. T. M. Ranmuthu, C. Kohl, C. S. Comstock, and M. Hassoun, "A 512K-bit magneto resistive memory with switched capacitor self-referencing sensing," IEEE Trans. Circuits Syst. Analog and Digital Signal Processing, pt. II, vol. 39, pp. 585-588, Aug. 1992.
8. B. Dieny, V. S. Speriosu, S. Metin, S. S. P. Parkin, B. A. Gurney, P. Baumgart, and D. R. Wilhoit, "Magnetotransport properties of magnetically soft spin-valve structures," J. Appl. Phys., vol. 69, p. 4774, 1991.
9. D. D. Tang, P. K. Wang, V. S. Speriosu, S. Le, and K. K. Kung, "Spin-valve RAM cell," IEEE Trans. Magn., vol. 31, p. 3206, Nov. 1995.
10. B. A. Everitt, A. V. Pohm, and J. M. Daughton, "Size dependence of switching thresholds for pseudo spin valve MRAM cells," J. Appl. Phys., vol. 81, no. 8, pp. 4020-4022, Apr. 1997.
11. A. V. Pohm, B. A. Everitt, R. S. Beech, and J. M. Daughton, "Bias field and end effects on the switching thresholds of 'pseudo spin valve' memory cells," IEEE Trans. Magn., vol. 33, pp. 3280-3282, Sept. 1997.
12. B. A. Everitt and A. V. Pohm, "Single-domain model for pseudo-spin-valve MRAM cells," IEEE Trans. Magn., vol. 33, pp. 3289-3291, Sept. 1997.
13. H.-J. Kim, B.-I. Lee, and S.-K. Joo, "Digital magnetoresistance characteristics of NiFeCo/Cu/Co spin-valve trilayers," IEEE Trans. Magn., vol. 34, pp. 558-561, Mar. 1998.
14. B. Dieny, V. S. Speriosu, S. S. P. Parkin, B. A. Gurney, D. R. Wilhoit, and D. Mauri, "Giant magnetoresistance in soft ferromagnetic multilayers," Phys. Rev. B, vol. 43, no. 1, pp. 1297-1300, Jan. 1991.
15. B. Das and W. C. Black, Jr., "A generalized HSPICE macro-model for spin-valve GMR memory bits," presented at the 1997 Midwest Symp. Circuits and Systems.
16. _, "A generalized HSPICE macro-model for pseudo-spin-valve GMR memory bits," presented at the 1998 IEEE Int. Symp. Circuits and Systems.
17. A. V. Pohm, J. M. Anderson, R. S. Beech, and J. M. Daughton, "Effect of write field rise times on the switching thresholds of pseudo spin valve memory cells," J. Appl. Phys., vol. 85, no. 8, pp. 4771-4772, Apr. 1999.
18. S. E. Russek, J. O. Oti, S. Kaka, and E. Y. Chen, "High-speed characterization of submicrometergiant magnetoresistive devices," J. Appl. Phys., vol. 85, no. 8, pp. 4773-4775, Apr. 1999.
19. J.-G. Zhu, Y. Zheng, and X. Lin, "Micromagnetics of small size patterned exchange biased Permalloy film elements," J. Appl. Phys., vol. 81, no. 8, pp. 4336-4341, Apr. 1997.
20. Y. Zheng and J.-G. Zhu, "Micromagnetic principles in pseudo spin valve memory element design," IEEE Trans. Magn., vol. 33, pp. 3286-3288, Sept. 1997.
21. T.-N. Fang and J.-G. Zhu, "Dynamic switching characteristics of pseudo-spin valve memory elements," IEEE Trans. Magn., vol. 35, pp. 2835-2837, Sept. 1999.
22. S. N. Tehrani, E. Chen, M. Durlam, and X. T. Zhu, "Method for detecting information stored in a MRAM cell having two magnetic layers in different thicknesses," U.S. Patent 5 703 805, Dec. 30, 1997.
23. R. Zhang, M. M. Hassoun, W. C. Black, Jr., B. Das, and K. A. Wong, "Demonstration of a four state sensing scheme for a single pseudo-spin valve GMR bit," IEEE Trans. Magn., vol. 35, pp. 2829-2831, Sept. 1999.
24. A. V. Pohm, private communication, 1998.
25. A. S. Sedra and K. C. Smith, Microelectronic Circuits, 3rd ed. Oxford, U.K.: Oxford Univ. Press, 1991.
26. C.-H. Lai, T. J. Regan, R. L. White, and T. C. Anthony, "Temperature dependence of magnetoresistance in spin valves with different thicknesses of NiO," J. Appl. Phys., vol. 81, no. 8, pp. 3989-3991, Apr. 1997.
27. J. Szucs, T. O'Brien, D. K. Lottis, S. Gangopadhyay, S. Mao, and E. Murdock, "Temperature variation of the magnetoresistance in cobalt-enhanced spin-valve structures," J. Appl. Phys., vol. 81, no. 8, pp. 4014-4016, Apr. 1997.
28. K. E. Goodson and M. I. Flik, "Effect of microscale thermal conduction on the packing limit of silicon-on-insulator electronic devices," IEEE Trans. Comp., Hybrids, Manufact. Technol., vol. 15, pp. 715-722, Oct. 1992.
29. J. S. Brodsky, R. M. Fox, D. T. Zweidinger, and S. Veeraraghavan, "A physics-based, dynamic thermal impedance model for SOI MOSFET's," IEEE Trans. Electron Devices, vol. 44, pp. 957-964, June 1997.
30. D. T. Zweidinger, R. M. Fox, J. S. Brodsky, T. Jung, and S.-G. Lee, "Thermal impedance extraction for bipolar transistors," IEEE Trans. Electron Devices, vol. 43, pp. 342-346, Feb. 1997.
31. A. V. Pohm, C. S. Comstock, C. E. Kohl, I. Ranmuthu, and K. T. M. Ranmuthu, "Temperature transients in normal and giant magneto-resistance memory cells," in Proc. IEEE 1992 Int. Nonvolatile Memory Technology Conf., 1992.
32. "Silicon nitride properties," http://www.ai.mit.edu/people/tk/tks/sil-icon-nitride.html, Nov. 1998.
33. A. S. Grove, Physics and Technology of Semiconductor Devices. New York: Wiley, 1967, pp. 102-103.
34. S. Middelhoek, Ferromagnetic Domains in Thin Ni-Fe Films. Amsterdam, The Netherlands: Drukkerij Wed. G. Van Soest N.V., 1961.
35. HSPICE User's Manual (HSPICE version H92): Avant! Corporation, vol. 1-3.
36. H. G. Brachtendorf, C. Eck, and R. Laur, "Macromodeling of hysteresis phenomena with SPICE," IEEE Trans. Circuits Syst., pt. II, vol. 44, p. 378, May 1997.
37. M. Parodi and M. Storace, "A PWL ladder circuit which exhibits hysteresis," Int. J. Circuit Theory Applicat., vol. 22, pp. 513-526, 1994.