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Volumn , Issue , 2000, Pages 625-630

Embedded hardware and software self-testing methodologies for processor cores

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; COMPUTER SOFTWARE; DATA STORAGE EQUIPMENT; EMBEDDED SYSTEMS;

EID: 0033685464     PISSN: 0738100X     EISSN: None     Source Type: Journal    
DOI: 10.1109/DAC.2000.855388     Document Type: Article
Times cited : (18)

References (14)
  • 1
    • 85177129741 scopus 로고    scopus 로고
    • The National Technology Roadmap for Semiconductors 1997 Semiconductor Industry Association
    • (1997)
  • 2
    • 0028396582 scopus 로고
    • Built-in self-test for digital integrated circuits
    • V. D. Agrawal Built-in self-test for digital integrated circuits AT&T Technical Journal 30 Mar. 1994
    • (1994) AT&T Technical Journal , pp. 30
    • Agrawal, V.D.1
  • 3
    • 0032306939 scopus 로고    scopus 로고
    • Native mode functional test generation for processors with applications to self test and design validation
    • J. Shen J. A. Abraham Native mode functional test generation for processors with applications to self test and design validation Proceedings of the International Test Conference 1998 990 999 Proceedings of the International Test Conference 1998 Washington, DC 1998-Oct.
    • (1998) , pp. 990-999
    • Shen, J.1    Abraham, J.A.2
  • 4
    • 0032691811 scopus 로고    scopus 로고
    • Instruction randomization self test for processor cores
    • California
    • K. Batcher C. Papachristou Instruction randomization self test for processor cores Proceedings of the 17 IEEE VLSI Test Symposium 34 40 Proceedings of the 17 IEEE VLSI Test Symposium Dana Point California 1999-April
    • (1999) , pp. 34-40
    • Batcher, K.1    Papachristou, C.2
  • 5
    • 0004079510 scopus 로고    scopus 로고
    • Arithmetic Built-in Self-Test for Embedded Systems
    • Prentice Hall
    • J. Rajski J. Tyszer Arithmetic Built-in Self-Test for Embedded Systems 1998 Prentice Hall
    • (1998)
    • Rajski, J.1    Tyszer, J.2
  • 7
    • 0030422467 scopus 로고    scopus 로고
    • Mixed-mode BIST using embedded processors
    • S. Hellebrand H.-J. Wunderlich Mixed-mode BIST using embedded processors Proceedings of the International Test Conference 1996 195 204 Proceedings of the International Test Conference 1996 Washington DC 1996-Oct.
    • (1996) , pp. 195-204
    • Hellebrand, S.1    Wunderlich, H.-J.2
  • 8
    • 0032306242 scopus 로고    scopus 로고
    • Accumulator based deterministic BIST
    • R. Dorsch H.-J. Wunderlich Accumulator based deterministic BIST Proceedings of the International Test Conference 1998 412 421 Proceedings of the International Test Conference 1998 Washington DC 1998-Oct.
    • (1998) , pp. 412-421
    • Dorsch, R.1    Wunderlich, H.-J.2
  • 9
    • 0033309980 scopus 로고    scopus 로고
    • Logic BIST for large industrial designs: real issues and case studies
    • New Jersey
    • G. Hetherington T. Fryars N. Tamarapalli M. Kassab A. Hassan J. Rajski Logic BIST for large industrial designs: real issues and case studies Proceedings of the International Test Conference 1999 358 367 Proceedings of the International Test Conference 1999 Atlantic City New Jersey 1999-Sept.
    • (1999) , pp. 358-367
    • Hetherington, G.1    Fryars, T.2    Tamarapalli, N.3    Kassab, M.4    Hassan, A.5    Rajski, J.6
  • 10
    • 0003410146 scopus 로고
    • VHDL: Analysis and modeling of digital systems
    • McGraw-Hill New York
    • Z. Navabi VHDL: Analysis and modeling of digital systems 1993 McGraw-Hill New York
    • (1993)
    • Navabi, Z.1
  • 11
    • 0031384267 scopus 로고    scopus 로고
    • A novel functional test generation method for processors using commercial ATPG
    • R. Tupuri J. A. Abraham A novel functional test generation method for processors using commercial ATPG Proceedings of the International Test Conference 1997 743 752 Proceedings of the International Test Conference 1997 Washington DC 1997-Nov.
    • (1997) , pp. 743-752
    • Tupuri, R.1    Abraham, J.A.2
  • 12
    • 0027803334 scopus 로고
    • CHEETA: Composition of hierarchical sequential tests using ATKET
    • Maryland
    • P. Vishakantaiah J. A. Abraham D. G. Saab CHEETA: Composition of hierarchical sequential tests using ATKET Proceedings of the International Test Conference 1993 606 615 Proceedings of the International Test Conference 1993 Baltimore Maryland 1993-Oct.
    • (1993) , pp. 606-615
    • Vishakantaiah, P.1    Abraham, J.A.2    Saab, D.G.3
  • 13
    • 0032681050 scopus 로고    scopus 로고
    • Test generation for gigahertz processors using an automatic functional constraint extractor
    • Louisiana
    • R. Tupuri A. Krishnamachary J. A. Abraham Test generation for gigahertz processors using an automatic functional constraint extractor Proceedings of the 36 Design Automation Conference 647 652 Proceedings of the 36 Design Automation Conference New Orleans Louisiana 1999-June
    • (1999) , pp. 647-652
    • Tupuri, R.1    Krishnamachary, A.2    Abraham, J.A.3
  • 14
    • 0031361733 scopus 로고    scopus 로고
    • How seriously do you take possible-detect faults?
    • R. Raina C. Njinda R. F. Molyneaux How seriously do you take possible-detect faults? Proceedings of the International Test Conference 1997 819 828 Proceedings of the International Test Conference 1997 Washington DC 1997-Nov.
    • (1997) , pp. 819-828
    • Raina, R.1    Njinda, C.2    Molyneaux, R.F.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.