Mixed-mode BIST using embedded processors

IEEE International Test Conference (TC)

Volumn , Issue , 1996, Pages 195-204

  Hellebrand, Sybille ^a   Wunderlich, Hans Joachim ^a   Hertwig, Andre ^a  

^a UNIVERSITY OF SIEGEN   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; COMPUTER SOFTWARE; MICROPROCESSOR CHIPS;

BUILT IN SELF TEST (BIST); RANDOM PATTERN TEST METHOD;

INTEGRATED CIRCUIT TESTING;

EID: 0030422467     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (32)