How seriously do you take possible-detect faults?

IEEE International Test Conference (TC)

Volumn , Issue , 1997, Pages 819-828

  Raina, Rajesh ^a   Njinda, Charles ^a   Molyneaux, Robert ^a  

^a MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC FAULT LOCATION; INTEGRATED CIRCUIT TESTING; LOGIC DESIGN; LOGIC GATES;

DESIGN FOR TEST (DFT) TECHNIQUES; TRISTATE LOGIC TESTING;

ELECTRIC FAULT CURRENTS;

EID: 0031361733     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (19)