Single-electron memory for giga-to-tera bit storage

Proceedings of the IEEE

Volumn 87, Issue 4, 1999, Pages 633-651

  Yano, Kazuo ^a   Ishii, Tomoyuki ^a   Sano, Toshiaki ^a   Mine, Toshiyuki ^a   Murai, Fumio ^a   Hashimoto, Takashi ^a   Kobayashi, Takashi ^a   Kure, Tokuo ^a   Seki, Koichi ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRON DEVICES; HYBRID INTEGRATED CIRCUITS; LITHOGRAPHY; MOS DEVICES; NANOSTRUCTURED MATERIALS; SEMICONDUCTING SILICON; SEMICONDUCTOR QUANTUM DOTS; VLSI CIRCUITS;

MEMORY INTEGRATION; NANOCRYSTALLINE SILICON; SINGLE ELECTRON MEMORY;

SEMICONDUCTOR STORAGE;

EID: 0033116234     PISSN: 00189219     EISSN: None     Source Type: Journal    
DOI: 10.1109/5.752519     Document Type: Article

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