Nanoelectronic architecture for boolean logic

Proceedings of the IEEE

Volumn 85, Issue 4, 1997, Pages 574-587

  Roychowdhury, Vwani P ^a   Janes, David B ^b   Bandyopadhyay, Supriyo ^c  

^a University of California   (United States)

^b PURDUE UNIVERSITY   (United States)

^c UNIVERSITY OF NEBRASKA LINCOLN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; COMBINATORIAL CIRCUITS; COMPUTER ARCHITECTURE; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC LOSSES; ELECTRON TUNNELING; FAULT TOLERANT COMPUTER SYSTEMS; INTEGRATED CIRCUIT MANUFACTURE; LOGIC GATES; RECTIFYING CIRCUITS; SEQUENTIAL CIRCUITS; TUNNEL DIODES;

CHEMICAL SELF ASSEMBLY FABRICATION TECHNIQUES; RESONANT TUNNELING DIODE (RTD);

LOGIC CIRCUITS;

EID: 0031123350     PISSN: 00189219     EISSN: None     Source Type: Journal    
DOI: 10.1109/5.573742     Document Type: Article

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